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Searched refs:STATE0 (Results 1 – 18 of 18) sorted by relevance

/drivers/gpu/drm/radeon/
Dbtcd.h91 #define STATE0(x) ((x) << 0) macro
Drv6xxd.h187 # define STATE0(x) ((x) << 0) macro
Drv770d.h291 #define STATE0(x) ((x) << 0) macro
Dbtc_dpm.c1778 WREG32_P(MC_ARB_BURST_TIME, STATE0(val), ~STATE0_MASK); in btc_set_arb0_registers()
1822 WREG32_P(MC_ARB_BURST_TIME, STATE0(val), ~STATE0_MASK); in btc_set_ulv_dram_timing()
Dnid.h765 #define STATE0(x) ((x) << 0) macro
Dsid.h516 #define STATE0(x) ((x) << 0) macro
Dcikd.h641 #define STATE0(x) ((x) << 0) macro
Devergreend.h277 #define STATE0(x) ((x) << 0) macro
Drv6xx_dpm.c810 sqm_ratio = (STATE0(64 * high_clock / pi->hw.sclks[R600_POWER_LEVEL_LOW]) | in rv6xx_program_memory_timing_parameters()
Drv770_dpm.c758 STATE0(64 * high_clock / pi->boot_sclk) | in rv770_program_memory_timing_parameters()
Dni_dpm.c1541 WREG32_P(MC_ARB_BURST_TIME, STATE0(burst_time), ~STATE0_MASK); in ni_copy_and_switch_arb_sets()
/drivers/gpu/drm/amd/amdgpu/
Dsid.h517 #define STATE0(x) ((x) << 0) macro
/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Diceland_smumgr.c1602 burstTime = PHM_READ_FIELD(hwmgr->device, MC_ARB_BURST_TIME, STATE0); in iceland_populate_memory_timing_parameters()
Dpolaris10_smumgr.c1480 burst_time = PHM_READ_FIELD(hwmgr->device, MC_ARB_BURST_TIME, STATE0); in polaris10_populate_memory_timing_parameters()
Dci_smumgr.c1640 burstTime = PHM_READ_FIELD(hwmgr->device, MC_ARB_BURST_TIME, STATE0); in ci_populate_memory_timing_parameters()
Dtonga_smumgr.c1477 burstTime = PHM_READ_FIELD(hwmgr->device, MC_ARB_BURST_TIME, STATE0); in tonga_populate_memory_timing_parameters()
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu7_hwmgr.c526 burst_time = PHM_READ_FIELD(hwmgr->device, MC_ARB_BURST_TIME, STATE0); in smu7_copy_and_switch_arb_sets()
541 PHM_WRITE_FIELD(hwmgr->device, MC_ARB_BURST_TIME, STATE0, burst_time); in smu7_copy_and_switch_arb_sets()
/drivers/gpu/drm/amd/pm/powerplay/
Dsi_dpm.c3098 WREG32_P(MC_ARB_BURST_TIME, STATE0(burst_time), ~STATE0_MASK); in ni_copy_and_switch_arb_sets()