Searched refs:Stream (Results 1 – 8 of 8) sorted by relevance
3 # "Xilinx AXI-Stream FIFO IP core driver"6 tristate "Xilinx AXI-Stream FIFO IP core driver"9 This adds support for the Xilinx AXI-Stream FIFO IP core driver.11 interface. The Xilinx AXI-Stream FIFO IP core can be used to interface
1 Xilinx AXI-Stream FIFO v4.1 IP core3 This IP core has read and write AXI-Stream FIFOs, the contents of which can28 - xlnx,axis-tdest-width: AXI-Stream TDEST width (ignored by the driver)29 - xlnx,axis-tid-width: AXI-Stream TID width (ignored by the driver)30 - xlnx,axis-tuser-width: AXI-Stream TUSER width (ignored by the driver)
20 it into an AXI4-Stream.
334 u8 Stream; /* Stream number (UVI1, UVI2, TVOUT) */ member562 u8 Stream; member666 u8 Stream; member
554 com.cmd.StreamControl.Stream = stream | (control ? 8 : 0); in ngene_command_stream_control()556 com.cmd.StreamControl.Stream |= 0x07; in ngene_command_stream_control()564 com.cmd.StreamControl.Stream, com.cmd.StreamControl.Control, in ngene_command_stream_control()599 com.cmd.StreamControl.Stream |= 0x07; in ngene_command_stream_control()615 com.cmd.StreamControl.Stream |= 0x04; in ngene_command_stream_control()
705 between memory and AXI4-Stream video type target707 Stream Video Protocol. It has two stream interfaces/708 channels, Memory Mapped to Stream (MM2S) and Stream to714 memory access between memory and AXI4-Stream target peripherals.716 between memory and AXI4-Stream target peripherals. It provides
70 based on the Stream ID of the corresponding master.
253 tristate "Niagara2 Stream Processing Unit driver"262 Each core of a Niagara2 processor contains a Stream