/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
D | vega12_smumgr.c | 249 &priv->smu_tables.entry[TABLE_WATERMARKS].handle, in vega12_smu_init() 250 &priv->smu_tables.entry[TABLE_WATERMARKS].mc_addr, in vega12_smu_init() 251 &priv->smu_tables.entry[TABLE_WATERMARKS].table); in vega12_smu_init() 256 priv->smu_tables.entry[TABLE_WATERMARKS].version = 0x01; in vega12_smu_init() 257 priv->smu_tables.entry[TABLE_WATERMARKS].size = sizeof(Watermarks_t); in vega12_smu_init() 334 amdgpu_bo_free_kernel(&priv->smu_tables.entry[TABLE_WATERMARKS].handle, in vega12_smu_init() 335 &priv->smu_tables.entry[TABLE_WATERMARKS].mc_addr, in vega12_smu_init() 336 &priv->smu_tables.entry[TABLE_WATERMARKS].table); in vega12_smu_init() 356 amdgpu_bo_free_kernel(&priv->smu_tables.entry[TABLE_WATERMARKS].handle, in vega12_smu_fini() 357 &priv->smu_tables.entry[TABLE_WATERMARKS].mc_addr, in vega12_smu_fini() [all …]
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D | vega20_smumgr.c | 458 &priv->smu_tables.entry[TABLE_WATERMARKS].handle, in vega20_smu_init() 459 &priv->smu_tables.entry[TABLE_WATERMARKS].mc_addr, in vega20_smu_init() 460 &priv->smu_tables.entry[TABLE_WATERMARKS].table); in vega20_smu_init() 464 priv->smu_tables.entry[TABLE_WATERMARKS].version = 0x01; in vega20_smu_init() 465 priv->smu_tables.entry[TABLE_WATERMARKS].size = sizeof(Watermarks_t); in vega20_smu_init() 542 amdgpu_bo_free_kernel(&priv->smu_tables.entry[TABLE_WATERMARKS].handle, in vega20_smu_init() 543 &priv->smu_tables.entry[TABLE_WATERMARKS].mc_addr, in vega20_smu_init() 544 &priv->smu_tables.entry[TABLE_WATERMARKS].table); in vega20_smu_init() 567 amdgpu_bo_free_kernel(&priv->smu_tables.entry[TABLE_WATERMARKS].handle, in vega20_smu_fini() 568 &priv->smu_tables.entry[TABLE_WATERMARKS].mc_addr, in vega20_smu_fini() [all …]
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D | smu10_smumgr.c | 265 priv->smu_tables.entry[SMU10_WMTABLE].table_id = TABLE_WATERMARKS; in smu10_smu_init()
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D | vega10_smumgr.c | 253 priv->smu_tables.entry[WMTABLE].table_id = TABLE_WATERMARKS; in vega10_smu_init()
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
D | dcn31_smu.c | 124 param == TABLE_WATERMARKS) in dcn31_smu_send_msg_with_param() 310 VBIOSSMC_MSG_TransferTableDram2Smu, TABLE_WATERMARKS); in dcn31_smu_transfer_wm_table_dram_2_smu()
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D | dcn31_smu.h | 218 #define TABLE_WATERMARKS 1 // Called by DAL through VBIOS macro
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
D | dcn30_clk_mgr_smu_msg.c | 188 DALSMC_MSG_TransferTableSmu2Dram, TABLE_WATERMARKS, NULL); in dcn30_smu_transfer_wm_table_smu_2_dram() 196 DALSMC_MSG_TransferTableDram2Smu, TABLE_WATERMARKS, NULL); in dcn30_smu_transfer_wm_table_dram_2_smu()
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D | dcn30_clk_mgr_smu_msg.h | 88 #define TABLE_WATERMARKS 1 macro
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/drivers/gpu/drm/amd/pm/inc/ |
D | smu11_driver_if_cyan_skillfish.h | 32 #define TABLE_WATERMARKS 1 // Called by Driver; defined here, but not used, for backward co… macro
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D | smu10.h | 179 #define TABLE_WATERMARKS 1 /* Called by Driver */ macro
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D | smu13_driver_if_yellow_carp.h | 212 #define TABLE_WATERMARKS 1 // Called by DAL through VBIOS macro
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D | smu12_driver_if.h | 222 #define TABLE_WATERMARKS 1 // Called by Driver macro
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D | smu11_driver_if_vangogh.h | 244 #define TABLE_WATERMARKS 1 // Called by DAL through VBIOS macro
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D | smu9_driver_if.h | 430 #define TABLE_WATERMARKS 1 macro
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D | smu11_driver_if.h | 833 #define TABLE_WATERMARKS 1 macro
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D | smu11_driver_if_navi10.h | 1195 #define TABLE_WATERMARKS 1 macro
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D | smu11_driver_if_sienna_cichlid.h | 1665 #define TABLE_WATERMARKS 1 macro
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
D | dcn301_smu.h | 83 #define TABLE_WATERMARKS 1 macro
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D | dcn301_smu.c | 261 VBIOSSMC_MSG_TransferTableDram2Smu, TABLE_WATERMARKS); in dcn301_smu_transfer_wm_table_dram_2_smu()
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/drivers/gpu/drm/amd/pm/inc/vega12/ |
D | smu9_driver_if.h | 707 #define TABLE_WATERMARKS 1 macro
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/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
D | vega12_hwmgr.c | 2537 (uint8_t *)wm_table, TABLE_WATERMARKS, false); in vega12_display_configuration_changed_task()
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D | vega20_hwmgr.c | 3649 (uint8_t *)wm_table, TABLE_WATERMARKS, false); in vega20_display_configuration_changed_task()
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