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Searched refs:UPLL_FB_DIV_MASK (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/radeon/
Drv770.c84 WREG32_P(CG_UPLL_FUNC_CNTL_3, UPLL_FB_DIV(0x50000), ~UPLL_FB_DIV_MASK); in rv770_set_uvd_clocks()
110 ~UPLL_FB_DIV_MASK); in rv770_set_uvd_clocks()
Drv770d.h63 # define UPLL_FB_DIV_MASK 0x01FFFFFF macro
Dsid.h147 # define UPLL_FB_DIV_MASK 0x01FFFFFF macro
Devergreend.h368 # define UPLL_FB_DIV_MASK 0x01FFFFFF macro
Dr600d.h1562 # define UPLL_FB_DIV_MASK 0x0000FFF0 macro
Dr600.c259 ~(UPLL_FB_DIV_MASK | UPLL_REF_DIV_MASK)); in r600_set_uvd_clocks()
Devergreen.c1236 WREG32_P(CG_UPLL_FUNC_CNTL_3, UPLL_FB_DIV(fb_div), ~UPLL_FB_DIV_MASK); in evergreen_set_uvd_clocks()
Dsi.c7043 WREG32_P(CG_UPLL_FUNC_CNTL_3, UPLL_FB_DIV(fb_div), ~UPLL_FB_DIV_MASK); in si_set_uvd_clocks()
/drivers/gpu/drm/amd/amdgpu/
Dsid.h148 # define UPLL_FB_DIV_MASK 0x01FFFFFF macro
Dsi.c1824 WREG32_P(CG_UPLL_FUNC_CNTL_3, UPLL_FB_DIV(fb_div), ~UPLL_FB_DIV_MASK); in si_set_uvd_clocks()