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Searched refs:UVD_JRBC_RB_WPTR__RB_WPTR_MASK (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h349 #define UVD_JRBC_RB_WPTR__RB_WPTR_MASK … macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h724 #define UVD_JRBC_RB_WPTR__RB_WPTR_MASK … macro
Dvcn_2_5_sh_mask.h702 #define UVD_JRBC_RB_WPTR__RB_WPTR_MASK … macro
Dvcn_2_0_0_sh_mask.h699 #define UVD_JRBC_RB_WPTR__RB_WPTR_MASK … macro
Dvcn_2_6_0_sh_mask.h2531 #define UVD_JRBC_RB_WPTR__RB_WPTR_MASK … macro
Dvcn_3_0_0_sh_mask.h861 #define UVD_JRBC_RB_WPTR__RB_WPTR_MASK … macro