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Searched refs:UlvPhaseSheddingPsi0 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/amd/pm/inc/
Dsmu9_driver_if.h175 uint8_t UlvPhaseSheddingPsi0; /* set this to 1 to set PSI0/1 to 1 in ULV mode */ member
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dvega10_hwmgr.c1485 data->smc_state_table.pp_table.UlvPhaseSheddingPsi0 = in vega10_populate_ulv_state()