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Searched refs:VC4_REG32 (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/vc4/
Dvc4_v3d.c17 VC4_REG32(V3D_IDENT0),
18 VC4_REG32(V3D_IDENT1),
19 VC4_REG32(V3D_IDENT2),
20 VC4_REG32(V3D_SCRATCH),
21 VC4_REG32(V3D_L2CACTL),
22 VC4_REG32(V3D_SLCACTL),
23 VC4_REG32(V3D_INTCTL),
24 VC4_REG32(V3D_INTENA),
25 VC4_REG32(V3D_INTDIS),
26 VC4_REG32(V3D_CT0CS),
[all …]
Dvc4_vec.c218 VC4_REG32(VEC_WSE_CONTROL),
219 VC4_REG32(VEC_WSE_WSS_DATA),
220 VC4_REG32(VEC_WSE_VPS_DATA1),
221 VC4_REG32(VEC_WSE_VPS_CONTROL),
222 VC4_REG32(VEC_REVID),
223 VC4_REG32(VEC_CONFIG0),
224 VC4_REG32(VEC_SCHPH),
225 VC4_REG32(VEC_CLMP0_START),
226 VC4_REG32(VEC_CLMP0_END),
227 VC4_REG32(VEC_FREQ3_2),
[all …]
Dvc4_hvs.c34 VC4_REG32(SCALER_DISPCTRL),
35 VC4_REG32(SCALER_DISPSTAT),
36 VC4_REG32(SCALER_DISPID),
37 VC4_REG32(SCALER_DISPECTRL),
38 VC4_REG32(SCALER_DISPPROF),
39 VC4_REG32(SCALER_DISPDITHER),
40 VC4_REG32(SCALER_DISPEOLN),
41 VC4_REG32(SCALER_DISPLIST0),
42 VC4_REG32(SCALER_DISPLIST1),
43 VC4_REG32(SCALER_DISPLIST2),
[all …]
Dvc4_dsi.c660 VC4_REG32(DSI0_CTRL),
661 VC4_REG32(DSI0_STAT),
662 VC4_REG32(DSI0_HSTX_TO_CNT),
663 VC4_REG32(DSI0_LPRX_TO_CNT),
664 VC4_REG32(DSI0_TA_TO_CNT),
665 VC4_REG32(DSI0_PR_TO_CNT),
666 VC4_REG32(DSI0_DISP0_CTRL),
667 VC4_REG32(DSI0_DISP1_CTRL),
668 VC4_REG32(DSI0_INT_STAT),
669 VC4_REG32(DSI0_INT_EN),
[all …]
Dvc4_crtc.c55 VC4_REG32(PV_CONTROL),
56 VC4_REG32(PV_V_CONTROL),
57 VC4_REG32(PV_VSYNCD_EVEN),
58 VC4_REG32(PV_HORZA),
59 VC4_REG32(PV_HORZB),
60 VC4_REG32(PV_VERTA),
61 VC4_REG32(PV_VERTB),
62 VC4_REG32(PV_VERTA_EVEN),
63 VC4_REG32(PV_VERTB_EVEN),
64 VC4_REG32(PV_INTEN),
[all …]
Dvc4_txp.c171 VC4_REG32(TXP_DST_PTR),
172 VC4_REG32(TXP_DST_PITCH),
173 VC4_REG32(TXP_DIM),
174 VC4_REG32(TXP_DST_CTRL),
175 VC4_REG32(TXP_PROGRESS),
Dvc4_dpi.c114 VC4_REG32(DPI_C),
115 VC4_REG32(DPI_ID),
Dvc4_drv.h578 #define VC4_REG32(reg) { .name = #reg, .offset = reg } macro