| /drivers/clk/sprd/ |
| D | gate.h | 33 _gate_flags, _udelay, _ops, _fn) \ argument
37 .flags = _gate_flags, \
49 _gate_flags, _udelay, _ops) \ argument
52 _gate_flags, _udelay, _ops, CLK_HW_INIT)
55 _enable_mask, _flags, _gate_flags, _ops) \ argument
58 _gate_flags, 0, _ops)
61 _enable_mask, _flags, _gate_flags) \ argument
63 _enable_mask, _flags, _gate_flags, \
67 _enable_mask, _flags, _gate_flags) \ argument
69 _enable_mask, _flags, _gate_flags, \
[all …]
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| /drivers/clk/actions/ |
| D | owl-gate.h | 27 #define OWL_GATE_HW(_reg, _bit_idx, _gate_flags) \ argument
31 .gate_flags = _gate_flags, \
35 _bit_idx, _gate_flags, _flags) \ argument
37 .gate_hw = OWL_GATE_HW(_reg, _bit_idx, _gate_flags), \
48 _bit_idx, _gate_flags, _flags) \ argument
50 .gate_hw = OWL_GATE_HW(_reg, _bit_idx, _gate_flags), \
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| /drivers/clk/tegra/ |
| D | clk-tegra-periph.c | 133 _clk_num, _gate_flags, _clk_id) \ argument
136 _clk_num, _gate_flags, _clk_id, _parents##_idx, 0,\
140 _clk_num, _gate_flags, _clk_id, flags)\ argument
143 _clk_num, _gate_flags, _clk_id, _parents##_idx, flags,\
147 _clk_num, _gate_flags, _clk_id) \ argument
150 _clk_num, _gate_flags, _clk_id, _parents##_idx, 0,\
166 _clk_num, _gate_flags, _clk_id) \ argument
169 TEGRA_DIVIDER_ROUND_UP, _clk_num, _gate_flags,\
173 _clk_num, _gate_flags, _clk_id, flags)\ argument
176 TEGRA_DIVIDER_ROUND_UP, _clk_num, _gate_flags,\
[all …]
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| D | clk.h | 645 _gate_flags, _table, _lock) \ argument
662 .flags = _gate_flags, \
688 _clk_num, _gate_flags, _clk_id, _table, \ argument
699 _gate_flags, _table, _lock), \
709 _clk_num, _gate_flags, _clk_id) \ argument
713 _clk_num, _gate_flags, _clk_id,\
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| D | clk-tegra30.c | 156 _clk_num, _gate_flags, _clk_id) \ argument
159 _clk_num, _gate_flags, _clk_id)
162 _clk_num, _gate_flags, _clk_id) \ argument
165 _clk_num, _gate_flags, _clk_id)
168 _clk_num, _gate_flags, _clk_id) \ argument
172 _gate_flags, _clk_id)
176 _gate_flags, _clk_id) \ argument
179 _clk_num, _gate_flags, \
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| D | clk-tegra20.c | 134 _clk_num, _gate_flags, _clk_id) \ argument
138 _gate_flags, _clk_id)
141 _clk_num, _gate_flags, _clk_id) \ argument
144 _clk_num, _gate_flags, \
149 _gate_flags, _clk_id) \ argument
152 _clk_num, _gate_flags, \
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| D | clk-tegra114.c | 116 _clk_num, _gate_flags, _clk_id) \ argument
119 _clk_num, _gate_flags, _clk_id, _parents##_idx, 0,\
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| D | clk-tegra124.c | 105 _gate_flags, _clk_id, _lock) \ argument
108 _clk_num, (_gate_flags) | TEGRA_PERIPH_NO_DIV,\
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| /drivers/clk/ |
| D | clk-stm32mp1.c | 1155 #define GATE(_id, _name, _parent, _flags, _offset, _bit_idx, _gate_flags)\ argument
1164 .gate_flags = _gate_flags,\
1261 #define _STM32_GATE(_gate_offset, _gate_bit_idx, _gate_flags, _mgate, _ops)\ argument
1266 .gate_flags = _gate_flags,\
1275 #define _GATE(_gate_offset, _gate_bit_idx, _gate_flags)\ argument
1276 _STM32_GATE(_gate_offset, _gate_bit_idx, _gate_flags,\
1279 #define _GATE_MP1(_gate_offset, _gate_bit_idx, _gate_flags)\ argument
1280 _STM32_GATE(_gate_offset, _gate_bit_idx, _gate_flags,\
1286 #define GATE_MP1(_id, _name, _parent, _flags, _offset, _bit_idx, _gate_flags)\ argument
1288 _GATE_MP1(_offset, _bit_idx, _gate_flags))
[all …]
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| D | clk-stm32h7.c | 292 #define M_CFG_GATE(_gate_ops, _gate_flags)\ argument
293 .gate = &(struct composite_clk_gcfg_t) { _gate_flags, _gate_ops}
|