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Searched refs:backend (Results 1 – 25 of 52) sorted by relevance

123

/drivers/gpu/drm/sun4i/
Dsun4i_backend.c80 void sun4i_backend_layer_enable(struct sun4i_backend *backend, in sun4i_backend_layer_enable() argument
93 regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_MODCTL_REG, in sun4i_backend_layer_enable()
168 int sun4i_backend_update_layer_coord(struct sun4i_backend *backend, in sun4i_backend_update_layer_coord() argument
178 regmap_write(backend->engine.regs, SUN4I_BACKEND_DISSIZE_REG, in sun4i_backend_update_layer_coord()
186 regmap_write(backend->engine.regs, SUN4I_BACKEND_LAYSIZE_REG(layer), in sun4i_backend_update_layer_coord()
193 regmap_write(backend->engine.regs, SUN4I_BACKEND_LAYCOOR_REG(layer), in sun4i_backend_update_layer_coord()
200 static int sun4i_backend_update_yuv_format(struct sun4i_backend *backend, in sun4i_backend_update_yuv_format() argument
211 regmap_write(backend->engine.regs, in sun4i_backend_update_yuv_format()
219 regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_ATTCTL_REG0(layer), in sun4i_backend_update_yuv_format()
252 regmap_write(backend->engine.regs, SUN4I_BACKEND_IYUVCTL_REG, val); in sun4i_backend_update_yuv_format()
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Dsun4i_layer.c73 struct sun4i_backend *backend = layer->backend; in sun4i_backend_layer_atomic_disable() local
75 sun4i_backend_layer_enable(backend, layer->id, false); in sun4i_backend_layer_atomic_disable()
80 spin_lock_irqsave(&backend->frontend_lock, flags); in sun4i_backend_layer_atomic_disable()
81 backend->frontend_teardown = true; in sun4i_backend_layer_atomic_disable()
82 spin_unlock_irqrestore(&backend->frontend_lock, flags); in sun4i_backend_layer_atomic_disable()
93 struct sun4i_backend *backend = layer->backend; in sun4i_backend_layer_atomic_update() local
94 struct sun4i_frontend *frontend = backend->frontend; in sun4i_backend_layer_atomic_update()
96 sun4i_backend_cleanup_layer(backend, layer->id); in sun4i_backend_layer_atomic_update()
104 sun4i_backend_update_layer_frontend(backend, layer->id, in sun4i_backend_layer_atomic_update()
108 sun4i_backend_update_layer_formats(backend, layer->id, plane); in sun4i_backend_layer_atomic_update()
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Dsun4i_backend.h195 void sun4i_backend_layer_enable(struct sun4i_backend *backend,
198 int sun4i_backend_update_layer_coord(struct sun4i_backend *backend,
200 int sun4i_backend_update_layer_formats(struct sun4i_backend *backend,
202 int sun4i_backend_update_layer_buffer(struct sun4i_backend *backend,
204 int sun4i_backend_update_layer_frontend(struct sun4i_backend *backend,
206 int sun4i_backend_update_layer_zpos(struct sun4i_backend *backend,
208 void sun4i_backend_cleanup_layer(struct sun4i_backend *backend,
DMakefile2 sun4i-backend-y += sun4i_backend.o sun4i_layer.o
32 obj-$(CONFIG_DRM_SUN4I_BACKEND) += sun4i-backend.o
/drivers/staging/media/atomisp/pci/runtime/isys/src/
Dcsi_rx_rmgr.c43 csi_rx_backend_ID_t backend, in ia_css_isys_csi_rx_lut_rmgr_acquire() argument
53 assert(backend < N_CSI_RX_BACKEND_ID); in ia_css_isys_csi_rx_lut_rmgr_acquire()
58 if ((backend < N_CSI_RX_BACKEND_ID) && (entry)) { in ia_css_isys_csi_rx_lut_rmgr_acquire()
59 cur_rsrc = &isys_csi_rx_rsrc[backend]; in ia_css_isys_csi_rx_lut_rmgr_acquire()
61 max_num_packets_of_type = N_LONG_PACKET_LUT_ENTRIES[backend]; in ia_css_isys_csi_rx_lut_rmgr_acquire()
64 max_num_packets_of_type = N_SHORT_PACKET_LUT_ENTRIES[backend]; in ia_css_isys_csi_rx_lut_rmgr_acquire()
93 csi_rx_backend_ID_t backend, in ia_css_isys_csi_rx_lut_rmgr_release() argument
101 assert(backend < N_CSI_RX_BACKEND_ID); in ia_css_isys_csi_rx_lut_rmgr_release()
106 if ((backend < N_CSI_RX_BACKEND_ID) && (entry)) { in ia_css_isys_csi_rx_lut_rmgr_release()
108 max_num_packets = N_LONG_PACKET_LUT_ENTRIES[backend]; in ia_css_isys_csi_rx_lut_rmgr_release()
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Dvirtual_isys.c91 csi_rx_backend_ID_t backend,
96 csi_rx_backend_ID_t backend,
633 csi_rx_backend_ID_t backend, in acquire_be_lut_entry() argument
637 return ia_css_isys_csi_rx_lut_rmgr_acquire(backend, packet_type, entry); in acquire_be_lut_entry()
641 csi_rx_backend_ID_t backend, in release_be_lut_entry() argument
645 ia_css_isys_csi_rx_lut_rmgr_release(backend, packet_type, entry); in release_be_lut_entry()
/drivers/target/
Dtarget_core_hba.c126 hba->backend = core_get_backend(plugin_name); in core_alloc_hba()
127 if (!hba->backend) { in core_alloc_hba()
132 ret = hba->backend->ops->attach_hba(hba, plugin_dep_id); in core_alloc_hba()
147 module_put(hba->backend->ops->owner); in core_alloc_hba()
148 hba->backend = NULL; in core_alloc_hba()
159 hba->backend->ops->detach_hba(hba); in core_delete_hba()
168 module_put(hba->backend->ops->owner); in core_delete_hba()
170 hba->backend = NULL; in core_delete_hba()
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu8_hwmgr.c162 struct smu8_hwmgr *data = hwmgr->backend; in smu8_get_max_sclk_level()
176 struct smu8_hwmgr *data = hwmgr->backend; in smu8_initialize_dpm_defaults()
259 struct smu8_hwmgr *data = hwmgr->backend; in smu8_construct_max_power_limits_table()
311 struct smu8_hwmgr *data = hwmgr->backend; in smu8_get_system_info_data()
415 struct smu8_hwmgr *data = hwmgr->backend; in smu8_construct_boot_state()
556 struct smu8_hwmgr *data = hwmgr->backend; in smu8_init_sclk_limit()
582 struct smu8_hwmgr *data = hwmgr->backend; in smu8_init_uvd_limit()
609 struct smu8_hwmgr *data = hwmgr->backend; in smu8_init_vce_limit()
636 struct smu8_hwmgr *data = hwmgr->backend; in smu8_init_acp_limit()
662 struct smu8_hwmgr *data = hwmgr->backend; in smu8_init_power_gate_state()
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Dsmu10_hwmgr.c54 struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend); in smu10_display_clock_voltage_request()
103 struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend); in smu10_initialize_dpm_defaults()
168 struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)hwmgr->backend; in smu10_get_system_info_data()
206 struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend); in smu10_set_min_deep_sleep_dcefclk()
220 struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend); in smu10_set_hard_min_dcefclk_by_freq()
234 struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend); in smu10_set_hard_min_fclk_by_freq()
248 struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend); in smu10_set_hard_min_gfxclk_by_freq()
262 struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend); in smu10_set_soft_max_gfxclk_by_freq()
276 struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend); in smu10_set_active_display_count()
296 struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend); in smu10_init_power_gate_state()
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Dvega12_hwmgr.c68 (struct vega12_hwmgr *)(hwmgr->backend); in vega12_set_default_registry_data()
142 (struct vega12_hwmgr *)(hwmgr->backend); in vega12_set_features_platform_caps()
299 struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend); in vega12_init_dpm_defaults()
381 kfree(hwmgr->backend); in vega12_hwmgr_backend_fini()
382 hwmgr->backend = NULL; in vega12_hwmgr_backend_fini()
397 hwmgr->backend = data; in vega12_hwmgr_backend_init()
454 (struct vega12_hwmgr *)(hwmgr->backend); in vega12_init_sclk_threshold()
489 (struct vega12_hwmgr *)(hwmgr->backend); in vega12_override_pcie_parameters()
638 (struct vega12_hwmgr *)(hwmgr->backend); in vega12_setup_default_dpm_tables()
778 struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
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Dsmu7_hwmgr.c268 (const struct smu7_hwmgr *)(hwmgr->backend); in smu7_voltage_control()
319 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in smu7_construct_voltage_tables()
432 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in smu7_program_static_screen_threshold_parameters()
478 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in smu7_program_voting_clients()
637 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in smu7_setup_default_pcie_table()
742 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in smu7_reset_dpm_tables()
784 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in smu7_setup_dpm_tables_v0()
870 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in smu7_setup_dpm_tables_v1()
935 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in smu7_odn_initial_default_setting()
980 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in smu7_setup_voltage_range_from_vbios()
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Dvega10_hwmgr.c118 struct vega10_hwmgr *data = hwmgr->backend; in vega10_set_default_registry_data()
196 struct vega10_hwmgr *data = hwmgr->backend; in vega10_set_features_platform_caps()
306 struct vega10_hwmgr *data = hwmgr->backend; in vega10_odn_initial_default_setting()
360 struct vega10_hwmgr *data = hwmgr->backend; in vega10_init_dpm_defaults()
554 struct vega10_hwmgr *data = hwmgr->backend; in vega10_get_evv_voltages()
743 struct vega10_hwmgr *data = hwmgr->backend; in vega10_complete_dependency_tables()
812 kfree(hwmgr->backend); in vega10_hwmgr_backend_fini()
813 hwmgr->backend = NULL; in vega10_hwmgr_backend_fini()
830 hwmgr->backend = data; in vega10_hwmgr_backend_init()
855 kfree(hwmgr->backend); in vega10_hwmgr_backend_init()
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Dvega12_thermal.c71 struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend); in vega12_enable_fan_control_feature()
89 struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend); in vega12_disable_fan_control_feature()
106 struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend); in vega12_fan_ctrl_start_smc_fan_control()
120 struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend); in vega12_fan_ctrl_stop_smc_fan_control()
253 struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend); in vega12_thermal_setup_fan_table()
Dvega20_hwmgr.c66 (struct vega20_hwmgr *)(hwmgr->backend); in vega20_set_default_registry_data()
180 (struct vega20_hwmgr *)(hwmgr->backend); in vega20_set_features_platform_caps()
334 struct vega20_hwmgr *data = (struct vega20_hwmgr *)(hwmgr->backend); in vega20_init_dpm_defaults()
421 kfree(hwmgr->backend); in vega20_hwmgr_backend_fini()
422 hwmgr->backend = NULL; in vega20_hwmgr_backend_fini()
436 hwmgr->backend = data; in vega20_hwmgr_backend_init()
482 (struct vega20_hwmgr *)(hwmgr->backend); in vega20_init_sclk_threshold()
586 (struct vega20_hwmgr *)(hwmgr->backend); in vega20_setup_gfxclk_dpm_table()
607 (struct vega20_hwmgr *)(hwmgr->backend); in vega20_setup_memclk_dpm_table()
636 (struct vega20_hwmgr *)(hwmgr->backend); in vega20_setup_default_dpm_tables()
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Dvega10_thermal.c92 struct vega10_hwmgr *data = hwmgr->backend; in vega10_fan_ctrl_get_fan_speed_rpm()
182 struct vega10_hwmgr *data = hwmgr->backend; in vega10_enable_fan_control_feature()
199 struct vega10_hwmgr *data = hwmgr->backend; in vega10_disable_fan_control_feature()
229 struct vega10_hwmgr *data = hwmgr->backend; in vega10_fan_ctrl_stop_smc_fan_control()
435 struct vega10_hwmgr *data = hwmgr->backend; in vega10_thermal_enable_alert()
466 struct vega10_hwmgr *data = hwmgr->backend; in vega10_thermal_disable_alert()
509 struct vega10_hwmgr *data = hwmgr->backend; in vega10_thermal_setup_fan_table()
565 struct vega10_hwmgr *data = hwmgr->backend; in vega10_enable_mgpu_fan_boost()
Dvega20_thermal.c34 struct vega20_hwmgr *data = hwmgr->backend; in vega20_disable_fan_control_feature()
53 struct vega20_hwmgr *data = hwmgr->backend; in vega20_fan_ctrl_stop_smc_fan_control()
63 struct vega20_hwmgr *data = hwmgr->backend; in vega20_enable_fan_control_feature()
82 struct vega20_hwmgr *data = hwmgr->backend; in vega20_fan_ctrl_start_smc_fan_control()
324 struct vega20_hwmgr *data = (struct vega20_hwmgr *)(hwmgr->backend); in vega20_thermal_setup_fan_table()
/drivers/vhost/
Dtest.c268 static void *backend; in vhost_test_set_backend() local
293 backend = vhost_vq_get_backend(vq); in vhost_test_set_backend()
296 vhost_vq_set_backend(vq, backend); in vhost_test_set_backend()
321 struct vhost_vring_file backend; in vhost_test_ioctl() local
334 if (copy_from_user(&backend, argp, sizeof backend)) in vhost_test_ioctl()
336 return vhost_test_set_backend(n, backend.index, backend.fd); in vhost_test_ioctl()
/drivers/xen/xenbus/
Dxenbus_probe_frontend.c424 char *backend, *frontend; in xenbus_check_frontend() local
439 backend = xenbus_read(XBT_NIL, frontend, "backend", NULL); in xenbus_check_frontend()
440 if (!backend || IS_ERR(backend)) in xenbus_check_frontend()
442 err = xenbus_scanf(XBT_NIL, backend, "state", "%i", &be_state); in xenbus_check_frontend()
444 xenbus_reset_frontend(frontend, backend, be_state); in xenbus_check_frontend()
445 kfree(backend); in xenbus_check_frontend()
/drivers/xen/
DKconfig96 Support for backend device drivers that provide I/O services
185 tristate "Xen PCI-device backend driver"
190 The PCI device backend driver allows the kernel to export arbitrary
200 The "hide" parameter (only applicable if backend driver is compiled
214 sends a small set of POSIX calls to the backend, which
218 tristate "XEN PV Calls backend driver"
221 Experimental backend for the Xen PV Calls protocol
223 allows PV Calls frontends to send POSIX calls to the backend,
229 tristate "XEN SCSI backend driver"
232 The SCSI backend driver allows the kernel to export its SCSI Devices
/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dvegam_smumgr.c228 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_process_firmware_header()
452 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_populate_smc_mvdd_table()
480 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_populate_smc_vddci_table()
506 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_populate_cac_table()
543 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_populate_ulv_level()
572 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_populate_smc_link_level()
607 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_get_dependency_volt_by_clk()
816 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_populate_single_graphic_level()
867 struct smu7_hwmgr *hw_data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_populate_all_graphic_levels()
985 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_populate_single_memory_level()
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Diceland_smumgr.c420 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_populate_vddc_vid()
622 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_populate_smc_vddc_table()
646 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_populate_smc_vdd_ci_table()
671 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_populate_smc_mvdd_table()
719 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_populate_ulv_level()
766 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_populate_smc_link_level()
798 const struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_calculate_sclk_params()
896 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_populate_single_graphic_level()
961 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_populate_all_graphic_levels()
1052 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_calculate_mclk_params()
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Dpolaris10_smumgr.c359 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in polaris10_get_dependency_volt_by_clk()
667 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in polaris10_populate_smc_mvdd_table()
695 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in polaris10_populate_smc_vddc_table()
720 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in polaris10_populate_smc_vddci_table()
746 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in polaris10_populate_cac_table()
781 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in polaris10_populate_ulv_level()
818 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in polaris10_populate_smc_link_level()
961 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in polaris10_populate_single_graphic_level()
1038 struct smu7_hwmgr *hw_data = (struct smu7_hwmgr *)(hwmgr->backend); in polaris10_populate_all_graphic_levels()
1156 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in polaris10_populate_single_memory_level()
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Dci_smumgr.c299 const struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in ci_calculate_sclk_params()
411 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in ci_populate_single_graphic_level()
473 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in ci_populate_all_graphic_levels()
610 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in ci_populate_vddc_vid()
717 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in ci_populate_bapm_parameters_in_dpm_table()
845 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in ci_populate_smc_vddc_table()
872 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in ci_populate_smc_vdd_ci_table()
900 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in ci_populate_smc_mvdd_table()
951 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in ci_populate_ulv_level()
998 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in ci_populate_smc_link_level()
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Dtonga_smumgr.c251 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in tonga_get_dependency_volt_by_clk()
306 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in tonga_populate_smc_vddc_table()
323 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in tonga_populate_smc_vdd_gfx_table()
339 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in tonga_populate_smc_vdd_ci_table()
369 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in tonga_populate_smc_mvdd_table()
396 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in tonga_populate_cac_tables()
509 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in tonga_populate_smc_link_level()
541 const struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in tonga_calculate_sclk_params()
622 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in tonga_populate_single_graphic_level()
688 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in tonga_populate_all_graphic_levels()
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/drivers/staging/media/atomisp/pci/runtime/isys/interface/
Dia_css_isys.h136 csi_rx_backend_ID_t backend,
141 csi_rx_backend_ID_t backend,

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