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Searched refs:bar1 (Results 1 – 25 of 26) sorted by relevance

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/drivers/media/pci/cobalt/
Dcobalt-driver.h125 (cobalt->bar1 + COBALT_VID_BASE + (c) * COBALT_VID_SIZE)
127 (cobalt->bar1 + COBALT_VID_BASE + (c) * COBALT_VID_SIZE + 0x100)
129 (cobalt->bar1 + COBALT_VID_BASE + (c) * COBALT_VID_SIZE + 0x200)
131 (cobalt->bar1 + COBALT_VID_BASE + (c) * COBALT_VID_SIZE + 0x300)
133 (cobalt->bar1 + COBALT_VID_BASE + (c) * COBALT_VID_SIZE + 0x400)
135 (cobalt->bar1 + COBALT_VID_BASE + (c) * COBALT_VID_SIZE + 0x500)
137 #define COBALT_TX_BASE(cobalt) (cobalt->bar1 + COBALT_VID_BASE + 0x5000)
257 void __iomem *bar0, *bar1; member
309 iowrite32(val, cobalt->bar1 + reg); in cobalt_write_bar1()
314 return ioread32(cobalt->bar1 + reg); in cobalt_read_bar1()
[all …]
Dcobalt-i2c.c88 (cobalt->bar1 + COBALT_I2C_0_BASE); in cobalt_i2c_regs()
91 (cobalt->bar1 + COBALT_I2C_1_BASE); in cobalt_i2c_regs()
94 (cobalt->bar1 + COBALT_I2C_2_BASE); in cobalt_i2c_regs()
97 (cobalt->bar1 + COBALT_I2C_3_BASE); in cobalt_i2c_regs()
100 (cobalt->bar1 + COBALT_I2C_HSMA_BASE); in cobalt_i2c_regs()
Dcobalt-driver.c285 if (cobalt->bar1) { in cobalt_pci_iounmap()
286 pci_iounmap(pci_dev, cobalt->bar1); in cobalt_pci_iounmap()
287 cobalt->bar1 = NULL; in cobalt_pci_iounmap()
353 cobalt->bar1 = pci_iomap(pci_dev, 1, 0); in cobalt_setup_pci()
354 if (cobalt->bar1 == NULL) { in cobalt_setup_pci()
355 cobalt->bar1 = pci_iomap(pci_dev, 2, 0); in cobalt_setup_pci()
358 if (!cobalt->bar0 || !cobalt->bar1) { in cobalt_setup_pci()
407 ioread8(cobalt->bar1 + COBALT_HDL_INFO_BASE + i); in cobalt_hdl_info_get()
Dcobalt-cpld.c17 return cobalt_bus_read32(cobalt->bar1, ADRS(offset)); in cpld_read()
22 return cobalt_bus_write32(cobalt->bar1, ADRS(offset), val); in cpld_write()
Dcobalt-flash.c91 map->virt = cobalt->bar1; in cobalt_flash_probe()
Dcobalt-v4l2.c441 void __iomem *adrs = cobalt->bar1 + regs->reg; in cobalt_cobaltc()
/drivers/gpu/drm/nouveau/nvkm/subdev/bar/
Dnv50.c69 nvkm_wr32(device, 0x001708, 0x80000000 | bar->bar1->node->offset >> 4); in nv50_bar_bar1_init()
187 ret = nvkm_gpuobj_new(device, 24, 16, false, bar->mem, &bar->bar1); in nv50_bar_oneinit()
191 nvkm_kmap(bar->bar1); in nv50_bar_oneinit()
192 nvkm_wo32(bar->bar1, 0x00, 0x7fc00000); in nv50_bar_oneinit()
193 nvkm_wo32(bar->bar1, 0x04, lower_32_bits(limit)); in nv50_bar_oneinit()
194 nvkm_wo32(bar->bar1, 0x08, lower_32_bits(start)); in nv50_bar_oneinit()
195 nvkm_wo32(bar->bar1, 0x0c, upper_32_bits(limit) << 24 | in nv50_bar_oneinit()
197 nvkm_wo32(bar->bar1, 0x10, 0x00000000); in nv50_bar_oneinit()
198 nvkm_wo32(bar->bar1, 0x14, 0x00000000); in nv50_bar_oneinit()
199 nvkm_done(bar->bar1); in nv50_bar_oneinit()
[all …]
Dbase.c36 return device->bar->func->bar1.vmm(device->bar); in nvkm_bar_bar1_vmm()
44 bar->func->bar1.init(bar); in nvkm_bar_bar1_reset()
45 bar->func->bar1.wait(bar); in nvkm_bar_bar1_reset()
96 if (bar->func->bar1.fini) in nvkm_bar_fini()
97 bar->func->bar1.fini(bar); in nvkm_bar_fini()
105 bar->func->bar1.init(bar); in nvkm_bar_init()
106 bar->func->bar1.wait(bar); in nvkm_bar_init()
Dg84.c47 .bar1.init = nv50_bar_bar1_init,
48 .bar1.fini = nv50_bar_bar1_fini,
49 .bar1.wait = nv50_bar_bar1_wait,
50 .bar1.vmm = nv50_bar_bar1_vmm,
Dgm107.c50 .bar1.init = gf100_bar_bar1_init,
51 .bar1.fini = gf100_bar_bar1_fini,
52 .bar1.wait = gm107_bar_bar1_wait,
53 .bar1.vmm = gf100_bar_bar1_vmm,
Dtu102.c83 .bar1.init = tu102_bar_bar1_init,
84 .bar1.fini = tu102_bar_bar1_fini,
85 .bar1.wait = tu102_bar_bar1_wait,
86 .bar1.vmm = gf100_bar_bar1_vmm,
Dgk20a.c28 .bar1.init = gf100_bar_bar1_init,
29 .bar1.wait = gf100_bar_bar1_wait,
30 .bar1.vmm = gf100_bar_bar1_vmm,
Dgm20b.c28 .bar1.init = gf100_bar_bar1_init,
29 .bar1.wait = gm107_bar_bar1_wait,
30 .bar1.vmm = gf100_bar_bar1_vmm,
Dgf100.c180 .bar1.init = gf100_bar_bar1_init,
181 .bar1.fini = gf100_bar_bar1_fini,
182 .bar1.wait = gf100_bar_bar1_wait,
183 .bar1.vmm = gf100_bar_bar1_vmm,
Dpriv.h20 } bar1, bar2; member
Dnv50.h14 struct nvkm_gpuobj *bar1; member
/drivers/scsi/aacraid/
Dsrc.c621 iounmap(dev->regs.src.bar1); in aac_src_ioremap()
622 dev->regs.src.bar1 = NULL; in aac_src_ioremap()
627 dev->regs.src.bar1 = ioremap(pci_resource_start(dev->pdev, 2), in aac_src_ioremap()
630 if (dev->regs.src.bar1 == NULL) in aac_src_ioremap()
634 iounmap(dev->regs.src.bar1); in aac_src_ioremap()
635 dev->regs.src.bar1 = NULL; in aac_src_ioremap()
657 dev->regs.src.bar1 = in aac_srcv_ioremap()
660 if (dev->regs.src.bar1 == NULL) in aac_srcv_ioremap()
664 iounmap(dev->regs.src.bar1); in aac_srcv_ioremap()
665 dev->regs.src.bar1 = NULL; in aac_srcv_ioremap()
[all …]
/drivers/tty/serial/
Drp2.c196 void __iomem *bar1; member
484 void __iomem *base = card->bar1 + RP2_ASIC_OFFSET(asic_id); in rp2_asic_interrupt()
597 void __iomem *base = card->bar1 + RP2_ASIC_OFFSET(asic_id); in rp2_reset_asic()
676 rp->asic_base = card->bar1; in rp2_load_firmware()
677 rp->base = card->bar1 + RP2_PORT_BASE + j*RP2_PORT_SPACING; in rp2_load_firmware()
678 rp->ucode = card->bar1 + RP2_UCODE_BASE + j*RP2_UCODE_SPACING; in rp2_load_firmware()
741 card->bar1 = bars[1]; in rp2_probe()
/drivers/net/ethernet/cavium/liquidio/
Dcn66xx_device.c417 u64 bar1; in lio_cn6xxx_bar1_idx_setup() local
420 bar1 = lio_pci_readq(oct, CN6XXX_BAR1_REG(idx, oct->pcie_port)); in lio_cn6xxx_bar1_idx_setup()
421 lio_pci_writeq(oct, (bar1 & 0xFFFFFFFEULL), in lio_cn6xxx_bar1_idx_setup()
423 bar1 = lio_pci_readq(oct, CN6XXX_BAR1_REG(idx, oct->pcie_port)); in lio_cn6xxx_bar1_idx_setup()
433 bar1 = lio_pci_readq(oct, CN6XXX_BAR1_REG(idx, oct->pcie_port)); in lio_cn6xxx_bar1_idx_setup()
Dcn23xx_pf_device.c1045 u64 bar1; in cn23xx_bar1_idx_setup() local
1051 WRITE_ONCE(bar1, reg_adr); in cn23xx_bar1_idx_setup()
1052 lio_pci_writeq(oct, (READ_ONCE(bar1) & 0xFFFFFFFEULL), in cn23xx_bar1_idx_setup()
1056 WRITE_ONCE(bar1, reg_adr); in cn23xx_bar1_idx_setup()
1066 WRITE_ONCE(bar1, lio_pci_readq( in cn23xx_bar1_idx_setup()
/drivers/net/ethernet/intel/ixgb/
Dixgb_hw.h662 u32 bar1; member
/drivers/net/ethernet/neterion/
Ds2io.h869 void __iomem *bar1; member
Ds2io.c7859 sp->bar1 = pci_ioremap_bar(pdev, 2); in s2io_init_nic()
7860 if (!sp->bar1) { in s2io_init_nic()
7869 mac_control->tx_FIFO_start[j] = sp->bar1 + (j * 0x00020000); in s2io_init_nic()
8132 iounmap(sp->bar1); in s2io_init_nic()
8173 iounmap(sp->bar1); in s2io_rem_nic()
/drivers/net/ethernet/broadcom/bnxt/
Dbnxt.c2071 val = readl(bp->bar1 + reg_off); in bnxt_fw_health_readl()
5687 db->doorbell = bp->bar1 + DB_PF_OFFSET_P5; in bnxt_set_db()
5689 db->doorbell = bp->bar1 + DB_VF_OFFSET_P5; in bnxt_set_db()
5707 db->doorbell = bp->bar1 + map_idx * 0x80; in bnxt_set_db()
11877 if (bp->bar1) { in bnxt_unmap_bars()
11878 pci_iounmap(pdev, bp->bar1); in bnxt_unmap_bars()
11879 bp->bar1 = NULL; in bnxt_unmap_bars()
12093 writel(val, bp->bar1 + reg_off); in bnxt_fw_reset_writel()
13239 bp->bar1 = pci_iomap(bp->pdev, 2, bp->db_size); in bnxt_map_db_bar()
13240 if (!bp->bar1) in bnxt_map_db_bar()
Dbnxt.h1595 void __iomem *bar1; member

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