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Searched refs:bit_num (Results 1 – 16 of 16) sorted by relevance

/drivers/infiniband/hw/bnxt_re/
Dqplib_res.c688 u32 bit_num; in bnxt_qplib_alloc_pd() local
690 bit_num = find_first_bit(pdt->tbl, pdt->max); in bnxt_qplib_alloc_pd()
691 if (bit_num == pdt->max) in bnxt_qplib_alloc_pd()
695 clear_bit(bit_num, pdt->tbl); in bnxt_qplib_alloc_pd()
696 pd->id = bit_num; in bnxt_qplib_alloc_pd()
744 u32 bit_num; in bnxt_qplib_alloc_dpi() local
746 bit_num = find_first_bit(dpit->tbl, dpit->max); in bnxt_qplib_alloc_dpi()
747 if (bit_num == dpit->max) in bnxt_qplib_alloc_dpi()
751 clear_bit(bit_num, dpit->tbl); in bnxt_qplib_alloc_dpi()
752 dpit->app_tbl[bit_num] = app; in bnxt_qplib_alloc_dpi()
[all …]
/drivers/gpio/
Dgpio-104-idi-48.c199 unsigned long bit_num; in idi_48_irq_handler() local
223 for_each_set_bit(bit_num, &irq_mask, 8) { in idi_48_irq_handler()
224 gpio = bit_num + boundary * 8; in idi_48_irq_handler()
/drivers/gpu/drm/hisilicon/kirin/
Dkirin_drm_ade.c94 static void ade_update_reload_bit(void __iomem *base, u32 bit_num, u32 val) in ade_update_reload_bit() argument
98 bit_ofst = bit_num % 32; in ade_update_reload_bit()
99 reg_num = bit_num / 32; in ade_update_reload_bit()
105 static u32 ade_read_reload_bit(void __iomem *base, u32 bit_num) in ade_read_reload_bit() argument
109 bit_ofst = bit_num % 32; in ade_read_reload_bit()
110 reg_num = bit_num / 32; in ade_read_reload_bit()
/drivers/mfd/
Dasic3.c566 u8 alt, pin, dir, init, bank_num, bit_num; in asic3_gpio_probe() local
575 bit_num = ASIC3_GPIO_TO_BIT(pin); in asic3_gpio_probe()
577 alt_reg[bank_num] |= (alt << bit_num); in asic3_gpio_probe()
578 out_reg[bank_num] |= (init << bit_num); in asic3_gpio_probe()
579 dir_reg[bank_num] |= (dir << bit_num); in asic3_gpio_probe()
/drivers/input/rmi4/
Drmi_f30.c105 unsigned int bit_num = button & 0x07; in rmi_f30_report_button() local
107 bool key_down = !(f30->data_regs[reg_num] & BIT(bit_num)); in rmi_f30_report_button()
/drivers/gpu/drm/amd/amdkfd/
Dkfd_device.c1265 unsigned int bit_num, in kfd_gtt_sa_calc_gpu_addr() argument
1268 return start_addr + bit_num * chunk_size; in kfd_gtt_sa_calc_gpu_addr()
1272 unsigned int bit_num, in kfd_gtt_sa_calc_cpu_addr() argument
1275 return (uint32_t *) ((uint64_t) start_addr + bit_num * chunk_size); in kfd_gtt_sa_calc_cpu_addr()
/drivers/gpu/drm/mediatek/
Dmtk_dpi.c75 enum mtk_dpi_out_bit_num bit_num; member
514 mtk_dpi_config_bit_num(dpi, dpi->bit_num); in mtk_dpi_set_display_mode()
596 dpi->bit_num = MTK_DPI_OUT_BIT_NUM_8BITS; in mtk_dpi_bridge_atomic_check()
Dmtk_hdmi.c452 enum hdmi_audio_sample_size bit_num) in mtk_hdmi_hw_aud_set_bit_num() argument
456 switch (bit_num) { in mtk_hdmi_hw_aud_set_bit_num()
/drivers/net/ethernet/marvell/mvpp2/
Dmvpp2_prs.c210 static void mvpp2_prs_sram_bits_set(struct mvpp2_prs_entry *pe, int bit_num, in mvpp2_prs_sram_bits_set() argument
213 pe->sram[MVPP2_BIT_TO_WORD(bit_num)] |= (val << (MVPP2_BIT_IN_WORD(bit_num))); in mvpp2_prs_sram_bits_set()
217 static void mvpp2_prs_sram_bits_clear(struct mvpp2_prs_entry *pe, int bit_num, in mvpp2_prs_sram_bits_clear() argument
220 pe->sram[MVPP2_BIT_TO_WORD(bit_num)] &= ~(val << (MVPP2_BIT_IN_WORD(bit_num))); in mvpp2_prs_sram_bits_clear()
/drivers/video/fbdev/via/
Dhw.c969 int bit_num = 0; in viafb_load_reg() local
983 shift_next_reg = bit_num; in viafb_load_reg()
987 get_bit = (timing_value & (BIT0 << bit_num)); in viafb_load_reg()
990 bit_num++; in viafb_load_reg()
/drivers/pinctrl/mvebu/
Dpinctrl-armada-37xx.c621 u32 bit_num = pin_idx % GPIO_PER_REG; in armada_37xx_edge_both_irq_swap_pol() local
629 if ((p ^ l) & (1 << bit_num)) { in armada_37xx_edge_both_irq_swap_pol()
640 p ^= 1 << bit_num; in armada_37xx_edge_both_irq_swap_pol()
/drivers/net/ethernet/amd/
Damd8111e.c1323 int bit_num; in amd8111e_set_multicast_list() local
1352 bit_num = (ether_crc_le(ETH_ALEN, ha->addr) >> 26) & 0x3f; in amd8111e_set_multicast_list()
1353 mc_filter[bit_num >> 5] |= 1 << (bit_num & 31); in amd8111e_set_multicast_list()
/drivers/net/ethernet/smsc/
Dsmsc9420.c1010 u32 bit_num = smsc9420_hash(ha->addr); in smsc9420_set_multicast_list() local
1011 u32 mask = 1 << (bit_num & 0x1F); in smsc9420_set_multicast_list()
1013 if (bit_num & 0x20) in smsc9420_set_multicast_list()
/drivers/misc/
Dxilinx_sdfec.c251 u32 reg_offset, u32 bit_num, in update_bool_config_from_reg() argument
255 u32 bit_mask = 1 << bit_num; in update_bool_config_from_reg()
/drivers/net/wireless/intel/iwlwifi/mvm/
Dmac80211.c2010 u8 bit_num = ppe_pos_bit % 8; in iwl_mvm_he_get_ppe_val() local
2014 if (bit_num <= 5) in iwl_mvm_he_get_ppe_val()
2015 return (ppe[byte_num] >> bit_num) & in iwl_mvm_he_get_ppe_val()
2024 residue_bits = 8 - bit_num; in iwl_mvm_he_get_ppe_val()
2029 res += (ppe[byte_num] >> bit_num) & (BIT(residue_bits) - 1); in iwl_mvm_he_get_ppe_val()
/drivers/net/ethernet/hisilicon/hns3/hns3pf/
Dhclge_main.c8293 unsigned int bit_num; in hclge_update_desc_vfid() local
8300 bit_num = vfid % 32; in hclge_update_desc_vfid()
8302 desc[1].data[word_num] &= cpu_to_le32(~(1 << bit_num)); in hclge_update_desc_vfid()
8304 desc[1].data[word_num] |= cpu_to_le32(1 << bit_num); in hclge_update_desc_vfid()
8307 bit_num = vfid % 32; in hclge_update_desc_vfid()
8309 desc[2].data[word_num] &= cpu_to_le32(~(1 << bit_num)); in hclge_update_desc_vfid()
8311 desc[2].data[word_num] |= cpu_to_le32(1 << bit_num); in hclge_update_desc_vfid()