| /drivers/clk/renesas/ |
| D | rcar-cpg-lib.c | 169 unsigned long calc_rate, diff; in cpg_sd_clock_determine_rate() local
173 calc_rate = DIV_ROUND_CLOSEST(req->best_parent_rate, in cpg_sd_clock_determine_rate()
175 if (calc_rate < req->min_rate || calc_rate > req->max_rate) in cpg_sd_clock_determine_rate()
178 diff = calc_rate > req->rate ? calc_rate - req->rate in cpg_sd_clock_determine_rate()
179 : req->rate - calc_rate; in cpg_sd_clock_determine_rate()
181 best_rate = calc_rate; in cpg_sd_clock_determine_rate()
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| D | clk-div6.c | 106 unsigned long prate, calc_rate, diff, best_rate, best_prate; in cpg_div6_clock_determine_rate() local
128 calc_rate = prate / div; in cpg_div6_clock_determine_rate()
129 diff = calc_rate > req->rate ? calc_rate - req->rate in cpg_div6_clock_determine_rate()
130 : req->rate - calc_rate; in cpg_div6_clock_determine_rate()
132 best_rate = calc_rate; in cpg_div6_clock_determine_rate()
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| /drivers/clk/actions/ |
| D | owl-factor.c | 49 u64 calc_rate; in _get_table_val() local
52 calc_rate = parent_rate * clkt->mul; in _get_table_val()
53 do_div(calc_rate, clkt->div); in _get_table_val()
55 if ((unsigned long)calc_rate <= rate) { in _get_table_val()
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| /drivers/clk/spear/ |
| D | clk.c | 17 unsigned long parent_rate, clk_calc_rate calc_rate, u8 rtbl_cnt, in clk_round_rate_index() argument
24 rate = calc_rate(hw, parent_rate, *index); in clk_round_rate_index()
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| D | clk.h | 131 unsigned long parent_rate, clk_calc_rate calc_rate, u8 rtbl_cnt,
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| /drivers/clk/qcom/ |
| D | clk-rcg2.c | 149 calc_rate(unsigned long rate, u32 m, u32 n, u32 mode, u32 hid_div) in calc_rate() function
184 return calc_rate(parent_rate, m, n, mode, hid_div); in clk_rcg2_recalc_rate()
581 req->rate = calc_rate(req->best_parent_rate, in clk_edp_pixel_determine_rate()
620 req->rate = calc_rate(parent_rate, 0, 0, 0, div); in clk_byte_determine_rate()
677 req->rate = calc_rate(parent_rate, 0, 0, 0, div); in clk_byte2_determine_rate()
1109 f->freq = calc_rate(prate, f->m, f->n, mode, f->pre_div); in clk_rcg2_dfs_populate_freq()
1191 return calc_rate(parent_rate, m, n, mode, pre_div); in clk_rcg2_dfs_recalc_rate()
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| D | clk-rcg.c | 326 calc_rate(unsigned long rate, u32 m, u32 n, u32 mode, u32 pre_div) in calc_rate() function
363 return calc_rate(parent_rate, m, n, mode, pre_div); in clk_rcg_recalc_rate()
396 return calc_rate(parent_rate, m, n, mode, pre_div); in clk_dyn_rcg_recalc_rate()
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| /drivers/clk/tegra/ |
| D | clk-tegra210.c | 1685 .calc_rate = tegra210_pll_fixed_mdiv_cfg,
1731 .calc_rate = tegra210_pll_fixed_mdiv_cfg,
1770 .calc_rate = tegra210_pll_fixed_mdiv_cfg,
1800 .calc_rate = tegra210_pll_fixed_mdiv_cfg,
1860 .calc_rate = tegra210_pll_fixed_mdiv_cfg,
1916 .calc_rate = tegra210_pll_fixed_mdiv_cfg,
1940 .calc_rate = tegra210_pll_fixed_mdiv_cfg,
1982 .calc_rate = tegra210_pll_fixed_mdiv_cfg,
2022 .calc_rate = tegra210_pll_fixed_mdiv_cfg,
2060 .calc_rate = tegra210_pll_fixed_mdiv_cfg,
[all …]
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| D | clk-pll.c | 820 pll->params->calc_rate(hw, &cfg, rate, parent_rate)) { in clk_pll_set_rate()
857 pll->params->calc_rate(hw, &cfg, rate, *prate)) in clk_pll_round_rate()
1904 if (!pll->params->calc_rate) { in _tegra_clk_register_pll()
1906 pll->params->calc_rate = _calc_dynamic_ramp_rate; in _tegra_clk_register_pll()
1908 pll->params->calc_rate = _calc_rate; in _tegra_clk_register_pll()
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| D | clk.h | 341 int (*calc_rate)(struct clk_hw *hw, member
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