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Searched refs:class2 (Results 1 – 20 of 20) sorted by relevance

/drivers/gpu/drm/radeon/
Dr600_dpm.h133 void r600_dpm_print_class_info(u32 class, u32 class2);
139 bool r600_is_uvd_state(u32 class, u32 class2);
Dr600_dpm.c69 void r600_dpm_print_class_info(u32 class, u32 class2) in r600_dpm_print_class_info() argument
92 (class2 == 0)) in r600_dpm_print_class_info()
121 if (class2 & ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2) in r600_dpm_print_class_info()
123 if (class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) in r600_dpm_print_class_info()
125 if (class2 & ATOM_PPLIB_CLASSIFICATION2_MVC) in r600_dpm_print_class_info()
724 bool r600_is_uvd_state(u32 class, u32 class2) in r600_is_uvd_state() argument
734 if (class2 & ATOM_PPLIB_CLASSIFICATION2_MVC) in r600_is_uvd_state()
Drs780_dpm.c724 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in rs780_parse_pplib_non_clock_info()
734 if (r600_is_uvd_state(rps->class, rps->class2)) { in rs780_parse_pplib_non_clock_info()
943 r600_dpm_print_class_info(rps->class, rps->class2); in rs780_dpm_print_power_state()
Dsumo_dpm.c828 !r600_is_uvd_state(new_rps->class, new_rps->class2)) in sumo_setup_uvd_clocks()
1142 (new_rps->class2 & ATOM_PPLIB_CLASSIFICATION2_MVC)) in sumo_apply_state_adjust_rules()
1411 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in sumo_parse_pplib_non_clock_info()
1802 r600_dpm_print_class_info(rps->class, rps->class2); in sumo_dpm_print_power_state()
Dtrinity_dpm.c1434 if (pi->uvd_dpm && r600_is_uvd_state(rps->class, rps->class2)) { in trinity_adjust_uvd_state()
1645 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in trinity_parse_pplib_non_clock_info()
1975 r600_dpm_print_class_info(rps->class, rps->class2); in trinity_dpm_print_power_state()
Drv770_dpm.c2152 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in rv7xx_parse_pplib_non_clock_info()
2162 if (r600_is_uvd_state(rps->class, rps->class2)) { in rv7xx_parse_pplib_non_clock_info()
2236 if (rps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) { in rv7xx_parse_pplib_clock_info()
2440 r600_dpm_print_class_info(rps->class, rps->class2); in rv770_dpm_print_power_state()
Dni_dpm.c2608 if (!r600_is_uvd_state(radeon_new_state->class, radeon_new_state->class2)) { in ni_enable_power_containment()
3390 if (!r600_is_uvd_state(radeon_new_state->class, radeon_new_state->class2)) { in ni_enable_smc_cac()
3904 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in ni_parse_pplib_non_clock_info()
3909 } else if (r600_is_uvd_state(rps->class, rps->class2)) { in ni_parse_pplib_non_clock_info()
3958 if (rps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) { in ni_parse_pplib_clock_info()
4292 r600_dpm_print_class_info(rps->class, rps->class2); in ni_dpm_print_power_state()
Drv6xx_dpm.c1800 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in rv6xx_parse_pplib_non_clock_info()
1802 if (r600_is_uvd_state(rps->class, rps->class2)) { in rv6xx_parse_pplib_non_clock_info()
2013 r600_dpm_print_class_info(rps->class, rps->class2); in rv6xx_dpm_print_power_state()
Dbtc_dpm.c1696 if (r600_is_uvd_state(radeon_new_state->class, radeon_new_state->class2)) in btc_set_at_for_uvd()
1718 if (r600_is_uvd_state(radeon_new_state->class, radeon_new_state->class2)) { in btc_notify_uvd_to_smc()
Dradeon_pm.c997 if (ps->class2 & ATOM_PPLIB_CLASSIFICATION2_MVC) in radeon_dpm_pick_power_state()
1011 if (ps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) in radeon_dpm_pick_power_state()
Dkv_dpm.c2389 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in kv_parse_pplib_non_clock_info()
2651 r600_dpm_print_class_info(rps->class, rps->class2); in kv_dpm_print_power_state()
Dsi_dpm.c6693 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in si_parse_pplib_non_clock_info()
6698 } else if (r600_is_uvd_state(rps->class, rps->class2)) { in si_parse_pplib_non_clock_info()
6751 if ((rps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) && in si_parse_pplib_clock_info()
Dci_dpm.c5422 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in ci_parse_pplib_non_clock_info()
5465 if (rps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) { in ci_parse_pplib_clock_info()
5938 r600_dpm_print_class_info(rps->class, rps->class2); in ci_dpm_print_power_state()
Dradeon.h1372 u32 class2; /* vbios flags */ member
/drivers/gpu/drm/amd/pm/
Damdgpu_dpm.c37 void amdgpu_dpm_print_class_info(u32 class, u32 class2) in amdgpu_dpm_print_class_info() argument
59 (class2 == 0)) in amdgpu_dpm_print_class_info()
88 if (class2 & ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2) in amdgpu_dpm_print_class_info()
90 if (class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) in amdgpu_dpm_print_class_info()
92 if (class2 & ATOM_PPLIB_CLASSIFICATION2_MVC) in amdgpu_dpm_print_class_info()
1361 if (ps->class2 & ATOM_PPLIB_CLASSIFICATION2_MVC) in amdgpu_dpm_pick_power_state()
1375 if (ps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) in amdgpu_dpm_pick_power_state()
/drivers/gpu/drm/amd/pm/inc/
Damdgpu_dpm.h58 u32 class2; /* vbios flags */ member
494 void amdgpu_dpm_print_class_info(u32 class, u32 class2);
/drivers/scsi/bfa/
Dbfa_fc.h351 struct fc_plogi_clp_s class2; /* class 2 service parameters */ member
Dbfa_fcs_rport.c2534 if (plogi->class2.class_valid) in bfa_fcs_rport_update()
/drivers/gpu/drm/amd/pm/powerplay/
Dsi_dpm.c3359 static bool r600_is_uvd_state(u32 class, u32 class2) in r600_is_uvd_state() argument
3369 if (class2 & ATOM_PPLIB_CLASSIFICATION2_MVC) in r600_is_uvd_state()
7110 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in si_parse_pplib_non_clock_info()
7115 } else if (r600_is_uvd_state(rps->class, rps->class2)) { in si_parse_pplib_non_clock_info()
7168 if ((rps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) && in si_parse_pplib_clock_info()
7897 amdgpu_dpm_print_class_info(rps->class, rps->class2); in si_dpm_print_power_state()
Dkv_dpm.c2647 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in kv_parse_pplib_non_clock_info()
2883 amdgpu_dpm_print_class_info(rps->class, rps->class2); in kv_dpm_print_power_state()