Searched refs:clk_core (Results 1 – 6 of 6) sorted by relevance
50 struct clk_core *core;56 struct clk_core { struct63 struct clk_core *parent; argument70 struct clk_core *new_parent; argument71 struct clk_core *new_child; argument100 struct clk_core *core; argument111 static int clk_pm_runtime_get(struct clk_core *core) in clk_pm_runtime_get()126 static void clk_pm_runtime_put(struct clk_core *core) in clk_pm_runtime_put()203 static bool clk_core_rate_is_protected(struct clk_core *core) in clk_core_rate_is_protected()208 static bool clk_core_is_prepared(struct clk_core *core) in clk_core_is_prepared()[all …]
48 struct clk *clk_core; member185 return (unsigned int) clk_get_rate(data->clk_core) / 1000; in pxa_cpufreq_get()211 clk_set_rate(data->clk_core, new_freq_cpu * 1000); in pxa_set_target()306 pxa_cpufreq_data.clk_core = clk_get_sys(NULL, "core"); in pxa_cpu_init()307 if (IS_ERR(pxa_cpufreq_data.clk_core)) in pxa_cpu_init()308 return PTR_ERR(pxa_cpufreq_data.clk_core); in pxa_cpu_init()
50 struct clk *clk_core; member400 pxa->clk_core = devm_clk_get(dev, "core"); in sdhci_pxav3_probe()401 if (!IS_ERR(pxa->clk_core)) in sdhci_pxav3_probe()402 clk_prepare_enable(pxa->clk_core); in sdhci_pxav3_probe()469 clk_disable_unprepare(pxa->clk_core); in sdhci_pxav3_probe()488 clk_disable_unprepare(pxa->clk_core); in sdhci_pxav3_remove()541 if (!IS_ERR(pxa->clk_core)) in sdhci_pxav3_runtime_suspend()542 clk_disable_unprepare(pxa->clk_core); in sdhci_pxav3_runtime_suspend()554 if (!IS_ERR(pxa->clk_core)) in sdhci_pxav3_runtime_resume()555 clk_prepare_enable(pxa->clk_core); in sdhci_pxav3_runtime_resume()
376 struct clk *clk_core; member728 ret = clk_prepare_enable(tcphy->clk_core); in tcphy_phy_init()793 clk_disable_unprepare(tcphy->clk_core); in tcphy_phy_init()802 clk_disable_unprepare(tcphy->clk_core); in tcphy_phy_deinit()1050 tcphy->clk_core = devm_clk_get(dev, "tcpdcore"); in tcphy_parse_dt()1051 if (IS_ERR(tcphy->clk_core)) { in tcphy_parse_dt()1053 return PTR_ERR(tcphy->clk_core); in tcphy_parse_dt()
484 clk_set_rate(gpu->clk_core, in etnaviv_gpu_update_clock()1541 ret = clk_prepare_enable(gpu->clk_core); in etnaviv_gpu_clk_enable()1552 clk_disable_unprepare(gpu->clk_core); in etnaviv_gpu_clk_enable()1564 clk_disable_unprepare(gpu->clk_core); in etnaviv_gpu_clk_disable()1827 gpu->clk_core = devm_clk_get(&pdev->dev, "core"); in etnaviv_gpu_platform_probe()1828 DBG("clk_core: %p", gpu->clk_core); in etnaviv_gpu_platform_probe()1829 if (IS_ERR(gpu->clk_core)) in etnaviv_gpu_platform_probe()1830 return PTR_ERR(gpu->clk_core); in etnaviv_gpu_platform_probe()1831 gpu->base_rate_core = clk_get_rate(gpu->clk_core); in etnaviv_gpu_platform_probe()
144 struct clk *clk_core; member