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Searched refs:clock_type (Results 1 – 25 of 52) sorted by relevance

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/drivers/nfc/fdp/
Di2c.c220 u8 *clock_type, u32 *clock_freq, in fdp_nci_i2c_read_device_properties() argument
226 r = device_property_read_u8(dev, FDP_DP_CLOCK_TYPE_NAME, clock_type); in fdp_nci_i2c_read_device_properties()
229 *clock_type = 0; in fdp_nci_i2c_read_device_properties()
270 *clock_type, *clock_freq, *fw_vsc_cfg != NULL ? "yes" : "no"); in fdp_nci_i2c_read_device_properties()
285 u8 clock_type; in fdp_nci_i2c_probe() local
330 fdp_nci_i2c_read_device_properties(dev, &clock_type, &clock_freq, in fdp_nci_i2c_probe()
336 clock_type, clock_freq, fw_vsc_cfg); in fdp_nci_i2c_probe()
Dfdp.c56 u8 clock_type; member
119 static int fdp_nci_set_clock(struct nci_dev *ndev, u8 clock_type, in fdp_nci_set_clock() argument
139 data[8] = clock_type; in fdp_nci_set_clock()
547 r = fdp_nci_set_clock(ndev, info->clock_type, info->clock_freq); in fdp_nci_post_setup()
701 int tx_tailroom, u8 clock_type, u32 clock_freq, in fdp_nci_probe() argument
716 info->clock_type = clock_type; in fdp_nci_probe()
Dfdp.h26 u8 clock_type, u32 clock_freq, const u8 *fw_vsc_cfg);
/drivers/staging/sm750fb/
Dddk750_chip.h34 enum clock_type { enum
43 enum clock_type clock_type; member
Dddk750_mode.c85 if (pll->clock_type == SECONDARY_PLL) { in programModeRegisters()
138 } else if (pll->clock_type == PRIMARY_PLL) { in programModeRegisters()
210 int ddk750_setModeTiming(struct mode_parameter *parm, enum clock_type clock) in ddk750_setModeTiming()
215 pll.clock_type = clock; in ddk750_setModeTiming()
Dddk750_mode.h36 int ddk750_setModeTiming(struct mode_parameter *parm, enum clock_type clock);
Dddk750_chip.c69 pll.clock_type = MXCLK_PLL; in set_chip_clock()
345 if (pll->clock_type == MXCLK_PLL) in sm750_calc_pll_value()
/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/
Ddce112_clk_mgr.c87 dce_clk_params.clock_type = DCECLOCK_TYPE_DISPLAY_CLOCK; in dce112_set_clock()
102 dce_clk_params.clock_type = DCECLOCK_TYPE_DPREFCLK; in dce112_set_clock()
143 dce_clk_params.clock_type = DCECLOCK_TYPE_DISPLAY_CLOCK; in dce112_set_dispclk()
180 dce_clk_params.clock_type = DCECLOCK_TYPE_DPREFCLK; in dce112_set_dprefclk()
/drivers/net/wan/
Dpci200syn.c119 switch (port->settings.clock_type) { in pci200_set_iface()
208 if (new_line.clock_type != CLOCK_EXT && in pci200_ioctl()
209 new_line.clock_type != CLOCK_TXFROMRX && in pci200_ioctl()
210 new_line.clock_type != CLOCK_INT && in pci200_ioctl()
211 new_line.clock_type != CLOCK_TXINT) in pci200_ioctl()
382 port->settings.clock_type = CLOCK_EXT; in pci200_pci_init_one()
Dc101.c146 switch (port->settings.clock_type) { in c101_set_iface()
256 if (new_line.clock_type != CLOCK_EXT && in c101_ioctl()
257 new_line.clock_type != CLOCK_TXFROMRX && in c101_ioctl()
258 new_line.clock_type != CLOCK_INT && in c101_ioctl()
259 new_line.clock_type != CLOCK_TXINT) in c101_ioctl()
369 card->settings.clock_type = CLOCK_EXT; in c101_run()
Dpc300too.c119 switch (port->settings.clock_type) { in pc300_set_iface()
231 if (new_line.clock_type != CLOCK_EXT && in pc300_ioctl()
232 new_line.clock_type != CLOCK_TXFROMRX && in pc300_ioctl()
233 new_line.clock_type != CLOCK_INT && in pc300_ioctl()
234 new_line.clock_type != CLOCK_TXINT) in pc300_ioctl()
443 port->settings.clock_type = CLOCK_EXT; in pc300_pci_init_one()
Dn2.c161 switch (port->settings.clock_type) { in n2_set_iface()
267 if (new_line.clock_type != CLOCK_EXT && in n2_ioctl()
268 new_line.clock_type != CLOCK_TXFROMRX && in n2_ioctl()
269 new_line.clock_type != CLOCK_INT && in n2_ioctl()
270 new_line.clock_type != CLOCK_TXINT) in n2_ioctl()
456 port->settings.clock_type = CLOCK_EXT; in n2_run()
Dwanxl.c58 unsigned int clock_type; member
360 line.clock_type = get_status(port)->clocking; in wanxl_ioctl()
378 if (line.clock_type != CLOCK_EXT && in wanxl_ioctl()
379 line.clock_type != CLOCK_TXFROMRX) in wanxl_ioctl()
385 get_status(port)->clocking = line.clock_type; in wanxl_ioctl()
Dixp4xx_hss.c262 unsigned int clock_type, clock_rate, loopback; member
400 if (port->clock_type == CLOCK_INT) in hss_config()
1274 new_line.clock_type = port->clock_type; in hss_hdlc_ioctl()
1288 clk = new_line.clock_type; in hss_hdlc_ioctl()
1298 port->clock_type = clk; /* Update settings */ in hss_hdlc_ioctl()
1368 port->clock_type = CLOCK_EXT; in hss_init_one()
/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_pp_smu.c453 pp_clock_request.clock_type = dc_to_pp_clock_type(clock_for_voltage_req->clk_type); in dm_pp_apply_clock_for_voltage_request()
456 if (!pp_clock_request.clock_type) in dm_pp_apply_clock_for_voltage_request()
668 clock_req.clock_type = amd_pp_dcef_clock; in pp_nv_set_hard_min_dcefclk_by_freq()
692 clock_req.clock_type = amd_pp_mem_clock; in pp_nv_set_hard_min_uclk_by_freq()
735 clock_req.clock_type = amd_pp_disp_clock; in pp_nv_set_voltage_by_freq()
738 clock_req.clock_type = amd_pp_phy_clock; in pp_nv_set_voltage_by_freq()
741 clock_req.clock_type = amd_pp_pixel_clock; in pp_nv_set_voltage_by_freq()
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_atombios.h158 u8 clock_type,
199 u8 clock_type,
/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_hw_sequencer.h180 enum dc_clock_type clock_type,
184 enum dc_clock_type clock_type,
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
Ddcn20_clk_mgr.h50 enum dc_clock_type clock_type,
Ddcn20_clk_mgr.c443 enum dc_clock_type clock_type, in dcn2_get_clock() argument
447 if (clock_type == DC_CLOCK_TYPE_DISPCLK) { in dcn2_get_clock()
453 if (clock_type == DC_CLOCK_TYPE_DPPCLK) { in dcn2_get_clock()
/drivers/gpu/drm/amd/display/dc/inc/
Dhw_sequencer.h184 enum dc_clock_type clock_type,
186 void (*get_clock)(struct dc *dc, enum dc_clock_type clock_type,
/drivers/gpu/drm/amd/include/
Ddm_pp_interface.h190 enum amd_pp_clock_type clock_type; member
/drivers/gpu/drm/amd/display/dc/inc/hw/
Dclk_mgr.h245 enum dc_clock_type clock_type,
Dclk_mgr_internal.h194 enum clock_type { enum
/drivers/gpu/drm/amd/display/include/
Dbios_parser_types.h269 enum bp_dce_clock_type clock_type; member
/drivers/gpu/drm/amd/display/dc/bios/
Dcommand_table2.c893 !cmd->dc_clock_type_to_atom(bp_params->clock_type, in set_dce_clock_v2_1()
900 if (bp_params->clock_type == DCECLOCK_TYPE_DPREFCLK) { in set_dce_clock_v2_1()
926 bp_params->clock_type); in set_dce_clock_v2_1()

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