| /drivers/base/ |
| D | attribute_container.c | 27 struct attribute_container *cont; member
58 return ic->cont; in attribute_container_classdev_to_container()
73 attribute_container_register(struct attribute_container *cont) in attribute_container_register() argument
75 INIT_LIST_HEAD(&cont->node); in attribute_container_register()
76 klist_init(&cont->containers, internal_container_klist_get, in attribute_container_register()
80 list_add_tail(&cont->node, &attribute_container_list); in attribute_container_register()
93 attribute_container_unregister(struct attribute_container *cont) in attribute_container_unregister() argument
98 spin_lock(&cont->containers.k_lock); in attribute_container_unregister()
99 if (!list_empty(&cont->containers.k_list)) in attribute_container_unregister()
102 list_del(&cont->node); in attribute_container_unregister()
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| D | transport_class.c | 33 static int transport_remove_classdev(struct attribute_container *cont,
120 static int transport_setup_classdev(struct attribute_container *cont, in transport_setup_classdev() argument
124 struct transport_class *tclass = class_to_transport_class(cont->class); in transport_setup_classdev()
125 struct transport_container *tcont = attribute_container_to_transport_container(cont); in transport_setup_classdev()
154 static int transport_add_class_device(struct attribute_container *cont, in transport_add_class_device() argument
158 struct transport_class *tclass = class_to_transport_class(cont->class); in transport_add_class_device()
161 attribute_container_to_transport_container(cont); in transport_add_class_device()
202 static int transport_configure(struct attribute_container *cont, in transport_configure() argument
206 struct transport_class *tclass = class_to_transport_class(cont->class); in transport_configure()
207 struct transport_container *tcont = attribute_container_to_transport_container(cont); in transport_configure()
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| /drivers/block/paride/ |
| D | bpck6.c | 59 static int bpck6_read_regr(PIA *pi, int cont, int reg) in bpck6_read_regr() argument
64 if (reg<0 || reg>7 || cont<0 || cont>2) in bpck6_read_regr()
68 out=ppc6_rd_port(PPCSTRUCT(pi),cont?reg|8:reg); in bpck6_read_regr()
72 static void bpck6_write_regr(PIA *pi, int cont, int reg, int val) in bpck6_write_regr() argument
75 if (reg>=0 && reg<=7 && cont>=0 && cont<=1) in bpck6_write_regr()
77 ppc6_wr_port(PPCSTRUCT(pi),cont?reg|8:reg,(u8)val); in bpck6_write_regr()
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| D | paride.c | 45 void pi_write_regr(PIA * pi, int cont, int regr, int val) in pi_write_regr() argument
47 pi->proto->write_regr(pi, cont, regr, val); in pi_write_regr()
52 int pi_read_regr(PIA * pi, int cont, int regr) in pi_read_regr() argument
54 return pi->proto->read_regr(pi, cont, regr); in pi_read_regr()
77 void (*cont) (void) = NULL; in pi_wake_up() local
82 cont = pi->claim_cont; in pi_wake_up()
91 if (cont) in pi_wake_up()
92 cont(); in pi_wake_up()
95 int pi_schedule_claimed(PIA * pi, void (*cont) (void)) in pi_schedule_claimed()
101 pi->claim_cont = cont; in pi_schedule_claimed()
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| D | fit2.c | 40 static void fit2_write_regr( PIA *pi, int cont, int regr, int val) in fit2_write_regr() argument
42 { if (cont == 1) return; in fit2_write_regr()
46 static int fit2_read_regr( PIA *pi, int cont, int regr ) in fit2_read_regr() argument
50 if (cont) { in fit2_read_regr()
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| D | ktti.c | 32 static void ktti_write_regr( PIA *pi, int cont, int regr, int val) in ktti_write_regr() argument
36 r = regr + cont_map[cont]; in ktti_write_regr()
42 static int ktti_read_regr( PIA *pi, int cont, int regr ) in ktti_read_regr() argument
46 r = regr + cont_map[cont]; in ktti_read_regr()
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| D | aten.c | 38 static void aten_write_regr( PIA *pi, int cont, int regr, int val) in aten_write_regr() argument
42 r = regr + cont_map[cont] + 0x80; in aten_write_regr()
47 static int aten_read_regr( PIA *pi, int cont, int regr ) in aten_read_regr() argument
51 r = regr + cont_map[cont] + 0x40; in aten_read_regr()
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| D | paride.h | 83 extern void pi_write_regr(PIA *pi, int cont, int regr, int val);
85 extern int pi_read_regr(PIA *pi, int cont, int regr);
95 extern void pi_do_claimed(PIA *pi, void (*cont)(void));
96 extern int pi_schedule_claimed(PIA *pi, void (*cont)(void));
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| D | on20.c | 36 static int on20_read_regr( PIA *pi, int cont, int regr ) in on20_read_regr() argument
40 r = (regr<<2) + 1 + cont; in on20_read_regr()
59 static void on20_write_regr( PIA *pi, int cont, int regr, int val ) in on20_write_regr() argument
63 r = (regr<<2) + 1 + cont; in on20_write_regr()
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| D | comm.c | 45 static int comm_read_regr( PIA *pi, int cont, int regr ) in comm_read_regr() argument
49 r = regr + cont_map[cont]; in comm_read_regr()
71 static void comm_write_regr( PIA *pi, int cont, int regr, int val ) in comm_write_regr() argument
75 r = regr + cont_map[cont]; in comm_write_regr()
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| D | fit3.c | 42 static void fit3_write_regr( PIA *pi, int cont, int regr, int val) in fit3_write_regr() argument
44 { if (cont == 1) return; in fit3_write_regr()
62 static int fit3_read_regr( PIA *pi, int cont, int regr ) in fit3_read_regr() argument
66 if (cont) { in fit3_read_regr()
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| D | dstr.c | 47 static int dstr_read_regr( PIA *pi, int cont, int regr ) in dstr_read_regr() argument
51 r = regr + cont_map[cont]; in dstr_read_regr()
74 static void dstr_write_regr( PIA *pi, int cont, int regr, int val ) in dstr_write_regr() argument
78 r = regr + cont_map[cont]; in dstr_write_regr()
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| D | friq.c | 51 static int friq_read_regr( PIA *pi, int cont, int regr ) in friq_read_regr() argument
55 r = regr + cont_map[cont]; in friq_read_regr()
66 static void friq_write_regr( PIA *pi, int cont, int regr, int val) in friq_write_regr() argument
70 r = regr + cont_map[cont]; in friq_write_regr()
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| D | epia.c | 49 static int epia_read_regr( PIA *pi, int cont, int regr ) in epia_read_regr() argument
53 regr += cont_map[cont]; in epia_read_regr()
82 static void epia_write_regr( PIA *pi, int cont, int regr, int val) in epia_write_regr() argument
86 regr += cont_map[cont]; in epia_write_regr()
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| D | frpw.c | 47 static int frpw_read_regr( PIA *pi, int cont, int regr ) in frpw_read_regr() argument
51 r = regr + cont_map[cont]; in frpw_read_regr()
63 static void frpw_write_regr( PIA *pi, int cont, int regr, int val) in frpw_write_regr() argument
67 r = regr + cont_map[cont]; in frpw_write_regr()
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| D | kbic.c | 45 static int kbic_read_regr( PIA *pi, int cont, int regr ) in kbic_read_regr() argument
49 s = cont_map[cont]; in kbic_read_regr()
75 static void kbic_write_regr( PIA *pi, int cont, int regr, int val) in kbic_write_regr() argument
79 s = cont_map[cont]; in kbic_write_regr()
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| /drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_dio_stream_encoder.c | 74 uint32_t cont, send, line; in enc3_update_hdmi_info_packet() local
84 cont = 1; in enc3_update_hdmi_info_packet()
90 cont = 0; in enc3_update_hdmi_info_packet()
101 HDMI_GENERIC0_CONT, cont, in enc3_update_hdmi_info_packet()
108 HDMI_GENERIC1_CONT, cont, in enc3_update_hdmi_info_packet()
115 HDMI_GENERIC2_CONT, cont, in enc3_update_hdmi_info_packet()
122 HDMI_GENERIC3_CONT, cont, in enc3_update_hdmi_info_packet()
129 HDMI_GENERIC4_CONT, cont, in enc3_update_hdmi_info_packet()
136 HDMI_GENERIC5_CONT, cont, in enc3_update_hdmi_info_packet()
143 HDMI_GENERIC6_CONT, cont, in enc3_update_hdmi_info_packet()
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| /drivers/gpu/host1x/ |
| D | debug.h | 16 void (*fn)(void *ctx, const char *str, size_t len, bool cont);
22 bool cont) in write_to_seqfile() argument
28 bool cont) in write_to_printk() argument
30 if (cont) in write_to_printk()
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| /drivers/infiniband/sw/rxe/ |
| D | rxe_task.c | 33 int cont; in rxe_do_task() local
60 cont = 0; in rxe_do_task()
69 cont = 1; in rxe_do_task()
85 cont = 1; in rxe_do_task()
93 } while (cont); in rxe_do_task()
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| /drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_stream_encoder.c | 54 uint32_t cont, send, line; in enc2_update_hdmi_info_packet() local
64 cont = 1; in enc2_update_hdmi_info_packet()
70 cont = 0; in enc2_update_hdmi_info_packet()
81 HDMI_GENERIC0_CONT, cont, in enc2_update_hdmi_info_packet()
88 HDMI_GENERIC1_CONT, cont, in enc2_update_hdmi_info_packet()
95 HDMI_GENERIC2_CONT, cont, in enc2_update_hdmi_info_packet()
102 HDMI_GENERIC3_CONT, cont, in enc2_update_hdmi_info_packet()
109 HDMI_GENERIC4_CONT, cont, in enc2_update_hdmi_info_packet()
116 HDMI_GENERIC5_CONT, cont, in enc2_update_hdmi_info_packet()
123 HDMI_GENERIC6_CONT, cont, in enc2_update_hdmi_info_packet()
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| /drivers/block/ |
| D | floppy.c | 542 } *cont; variable
915 cont = NULL; in unlock_fdc()
1031 cont->done(0); in fd_watchdog()
1043 cont->interrupt(); in main_command_interrupt()
1074 cont->done(0); in setup_DMA()
1080 cont->done(0); in setup_DMA()
1092 cont->done(0); in setup_DMA()
1220 cont->done(0); in perpendicular_mode()
1448 cont->done(0); in interpret_errors()
1466 cont->done(0); in interpret_errors()
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| /drivers/iio/pressure/ |
| D | zpa2326.c | 791 bool cont; in zpa2326_handle_threaded_irq() local
798 cont = (iio_buffer_enabled(indio_dev) && in zpa2326_handle_threaded_irq()
807 if (cont) in zpa2326_handle_threaded_irq()
824 if (cont) in zpa2326_handle_threaded_irq()
834 if (cont) in zpa2326_handle_threaded_irq()
1158 bool cont; in zpa2326_trigger_handler() local
1165 cont = iio_trigger_using_own(indio_dev); in zpa2326_trigger_handler()
1167 if (!cont) { in zpa2326_trigger_handler()
1191 if (!cont) in zpa2326_trigger_handler()
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| /drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_stream_encoder.c | 186 uint32_t cont, send, line; in dce110_update_hdmi_info_packet() local
196 cont = 1; in dce110_update_hdmi_info_packet()
202 cont = 0; in dce110_update_hdmi_info_packet()
211 HDMI_GENERIC0_CONT, cont, in dce110_update_hdmi_info_packet()
217 HDMI_GENERIC1_CONT, cont, in dce110_update_hdmi_info_packet()
223 HDMI_GENERIC0_CONT, cont, in dce110_update_hdmi_info_packet()
229 HDMI_GENERIC1_CONT, cont, in dce110_update_hdmi_info_packet()
237 HDMI_GENERIC0_CONT, cont, in dce110_update_hdmi_info_packet()
244 HDMI_GENERIC1_CONT, cont, in dce110_update_hdmi_info_packet()
251 HDMI_GENERIC0_CONT, cont, in dce110_update_hdmi_info_packet()
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| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_stream_encoder.c | 164 uint32_t cont, send, line; in enc1_update_hdmi_info_packet() local
175 cont = 1; in enc1_update_hdmi_info_packet()
181 cont = 0; in enc1_update_hdmi_info_packet()
190 HDMI_GENERIC0_CONT, cont, in enc1_update_hdmi_info_packet()
196 HDMI_GENERIC1_CONT, cont, in enc1_update_hdmi_info_packet()
202 HDMI_GENERIC0_CONT, cont, in enc1_update_hdmi_info_packet()
208 HDMI_GENERIC1_CONT, cont, in enc1_update_hdmi_info_packet()
214 HDMI_GENERIC0_CONT, cont, in enc1_update_hdmi_info_packet()
220 HDMI_GENERIC1_CONT, cont, in enc1_update_hdmi_info_packet()
226 HDMI_GENERIC0_CONT, cont, in enc1_update_hdmi_info_packet()
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| /drivers/net/can/ |
| D | pch_can.c | 135 u32 cont; member
207 pch_can_bit_clear(&priv->regs->cont, PCH_CTRL_INIT); in pch_can_set_run_mode()
211 pch_can_bit_set(&priv->regs->cont, PCH_CTRL_INIT); in pch_can_set_run_mode()
230 pch_can_bit_set(&priv->regs->cont, PCH_CTRL_OPT); in pch_can_set_optmode()
256 pch_can_bit_clear(&priv->regs->cont, PCH_CTRL_IE); in pch_can_set_int_enables()
260 pch_can_bit_set(&priv->regs->cont, PCH_CTRL_IE_SIE_EIE); in pch_can_set_int_enables()
264 pch_can_bit_clear(&priv->regs->cont, PCH_CTRL_IE_SIE_EIE); in pch_can_set_int_enables()
780 pch_can_bit_set(&priv->regs->cont, PCH_CTRL_CCE); in pch_set_bittiming()
789 pch_can_bit_clear(&priv->regs->cont, PCH_CTRL_CCE); in pch_set_bittiming()
963 pch_can_bit_clear(&priv->regs->cont, PCH_CTRL_IE_SIE_EIE); in pch_can_set_int_custom()
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