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Searched refs:cpll (Results 1 – 16 of 16) sorted by relevance

/drivers/clk/pxa/
Dclk-pxa.c214 rate = freqs[i].cpll; in pxa2xx_determine_rate()
232 rate = freqs[closest_below].cpll; in pxa2xx_determine_rate()
234 rate = freqs[closest_above].cpll; in pxa2xx_determine_rate()
Dclk-pxa.h135 unsigned long cpll; member
Dclk-pxa25x.c265 if (pxa25x_freqs[i].cpll == rate) in clk_pxa25x_cpll_set_rate()
Dclk-pxa27x.c257 if (pxa27x_freqs[i].cpll == rate) in clk_pxa27x_cpll_set_rate()
/drivers/clk/samsung/
Dclk-exynos5410.c61 apll, cpll, epll, mpll, enumerator
242 [cpll] = PLL(pll_35xx, CLK_FOUT_CPLL, "fout_cpll", "fin_pll", CPLL_LOCK,
Dclk-exynos5250.c105 apll, mpll, cpll, epll, vpll, gpll, bpll, enumerator
741 [cpll] = PLL(pll_35xx, CLK_FOUT_CPLL, "fout_cpll", "fin_pll", CPLL_LOCK,
Dclk-exynos5420.c150 apll, cpll, dpll, epll, rpll, ipll, spll, vpll, mpll, enumerator
1464 [cpll] = PLL(pll_2550, CLK_FOUT_CPLL, "fout_cpll", "fin_pll", CPLL_LOCK,
/drivers/clk/rockchip/
Dclk-rk3188.c19 apll, cpll, dpll, gpll, enumerator
220 [cpll] = PLL(pll_rk3066, PLL_CPLL, "cpll", mux_pll_p, 0, RK2928_PLL_CON(8),
231 [cpll] = PLL(pll_rk3066, PLL_CPLL, "cpll", mux_pll_p, 0, RK2928_PLL_CON(8),
Dclk-rk3128.c18 apll, dpll, cpll, gpll, enumerator
163 [cpll] = PLL(pll_rk3036, PLL_CPLL, "cpll", mux_pll_p, 0, RK2928_PLL_CON(8),
Dclk-rk3228.c19 apll, dpll, cpll, gpll, enumerator
173 [cpll] = PLL(pll_rk3036, PLL_CPLL, "cpll", mux_pll_p, 0, RK2928_PLL_CON(6),
Dclk-rk3328.c21 apll, dpll, cpll, gpll, npll, enumerator
221 [cpll] = PLL(pll_rk3328, PLL_CPLL, "cpll", mux_pll_p,
Dclk-rk3368.c17 apllb, aplll, dpll, cpll, gpll, npll, enumerator
136 [cpll] = PLL(pll_rk3066, PLL_CPLL, "cpll", mux_pll_p, 0, RK3368_PLL_CON(12),
Dclk-rk3288.c24 apll, dpll, cpll, gpll, npll, enumerator
230 [cpll] = PLL(pll_rk3066, PLL_CPLL, "cpll", mux_pll_p, 0, RK3288_PLL_CON(8),
Dclk-px30.c18 apll, dpll, cpll, npll, apll_b_h, apll_b_l, enumerator
191 [cpll] = PLL(pll_rk3328, PLL_CPLL, "cpll", mux_pll_p,
Dclk-rk3399.c19 lpll, bpll, dpll, cpll, gpll, npll, vpll, enumerator
225 [cpll] = PLL(pll_rk3399, PLL_CPLL, "cpll", mux_pll_p, 0, RK3399_PLL_CON(24),
Dclk-rk3568.c23 apll, dpll, gpll, cpll, npll, vpll, enumerator
321 [cpll] = PLL(pll_rk3328, PLL_CPLL, "cpll", mux_pll_p,