Searched refs:cr2 (Results 1 – 7 of 7) sorted by relevance
/drivers/i2c/busses/ |
D | i2c-stm32f7.c | 194 u32 cr2; member 790 u32 cr2; in stm32f7_i2c_reload() local 795 cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_reload() 797 cr2 &= ~STM32F7_I2C_CR2_NBYTES_MASK; in stm32f7_i2c_reload() 799 cr2 |= STM32F7_I2C_CR2_NBYTES(STM32F7_I2C_MAX_LEN); in stm32f7_i2c_reload() 801 cr2 &= ~STM32F7_I2C_CR2_RELOAD; in stm32f7_i2c_reload() 802 cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count); in stm32f7_i2c_reload() 805 writel_relaxed(cr2, i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_reload() 811 u32 cr2; in stm32f7_i2c_smbus_reload() local 825 cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_smbus_reload() [all …]
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D | i2c-stm32f4.c | 154 u32 cr2 = 0; in stm32f4_i2c_set_periph_clk_freq() local 185 cr2 |= STM32F4_I2C_CR2_FREQ(freq); in stm32f4_i2c_set_periph_clk_freq() 186 writel_relaxed(cr2, i2c_dev->base + STM32F4_I2C_CR2); in stm32f4_i2c_set_periph_clk_freq() 561 u32 status, ien, event, cr2; in stm32f4_i2c_isr_event() local 563 cr2 = readl_relaxed(i2c_dev->base + STM32F4_I2C_CR2); in stm32f4_i2c_isr_event() 564 ien = cr2 & STM32F4_I2C_CR2_IRQ_MASK; in stm32f4_i2c_isr_event() 594 cr2 |= STM32F4_I2C_CR2_ITBUFEN; in stm32f4_i2c_isr_event() 595 writel_relaxed(cr2, i2c_dev->base + STM32F4_I2C_CR2); in stm32f4_i2c_isr_event()
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/drivers/tty/serial/ |
D | stm32-usart.h | 13 u8 cr2; member 49 .cr2 = 0x10, 66 .cr2 = 0x04, 88 .cr2 = 0x04,
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D | fsl_lpuart.c | 1122 unsigned char cr2; in lpuart_copy_rx_to_tty() local 1125 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty() 1126 cr2 &= ~UARTCR2_RE; in lpuart_copy_rx_to_tty() 1127 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty() 1153 cr2 |= UARTCR2_RE; in lpuart_copy_rx_to_tty() 1154 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty() 1543 unsigned char val, cr2; in lpuart_setup_watermark() local 1546 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_setup_watermark() 1547 cr2_saved = cr2; in lpuart_setup_watermark() 1548 cr2 &= ~(UARTCR2_TIE | UARTCR2_TCIE | UARTCR2_TE | in lpuart_setup_watermark() [all …]
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D | stm32-usart.c | 749 val = readl_relaxed(port->membase + ofs->cr2); in stm32_usart_startup() 751 writel_relaxed(val, port->membase + ofs->cr2); in stm32_usart_startup() 816 u32 cr1, cr2, cr3, isr; in stm32_usart_set_termios() local 847 cr2 = stm32_port->swap ? USART_CR2_SWAP : 0; in stm32_usart_set_termios() 860 cr2 |= USART_CR2_STOP_2B; in stm32_usart_set_termios() 905 cr2 |= USART_CR2_RTOEN; in stm32_usart_set_termios() 999 writel_relaxed(cr2, port->membase + ofs->cr2); in stm32_usart_set_termios()
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/drivers/iio/trigger/ |
D | stm32-timer-trigger.c | 80 u32 cr2; member 290 u32 cr2; in stm32_tt_show_master_mode() local 292 regmap_read(priv->regmap, TIM_CR2, &cr2); in stm32_tt_show_master_mode() 295 cr2 = (cr2 & TIM_CR2_MMS2) >> TIM_CR2_MMS2_SHIFT; in stm32_tt_show_master_mode() 297 cr2 = (cr2 & TIM_CR2_MMS) >> TIM_CR2_MMS_SHIFT; in stm32_tt_show_master_mode() 299 return sysfs_emit(buf, "%s\n", master_mode_table[cr2]); in stm32_tt_show_master_mode() 838 regmap_read(priv->regmap, TIM_CR2, &priv->bak.cr2); in stm32_timer_trigger_suspend() 864 regmap_write(priv->regmap, TIM_CR2, priv->bak.cr2); in stm32_timer_trigger_resume()
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/drivers/spi/ |
D | spi-stm32.c | 1107 u32 cr2 = 0; in stm32f4_spi_transfer_one_irq() local 1111 cr2 |= STM32F4_SPI_CR2_TXEIE; in stm32f4_spi_transfer_one_irq() 1119 cr2 |= STM32F4_SPI_CR2_RXNEIE | STM32F4_SPI_CR2_ERRIE; in stm32f4_spi_transfer_one_irq() 1126 stm32_spi_set_bits(spi, STM32F4_SPI_CR2, cr2); in stm32f4_spi_transfer_one_irq()
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