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Searched refs:crtc_timing (Results 1 – 16 of 16) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dce/
Ddce_stream_encoder.c275 struct dc_crtc_timing *crtc_timing, in dce110_stream_encoder_dp_set_stream_attribute() argument
294 struct dc_crtc_timing hw_crtc_timing = *crtc_timing; in dce110_stream_encoder_dp_set_stream_attribute()
524 struct dc_crtc_timing *crtc_timing) in dce110_stream_encoder_set_stream_attribute_helper() argument
527 switch (crtc_timing->pixel_encoding) { in dce110_stream_encoder_set_stream_attribute_helper()
537 switch (crtc_timing->pixel_encoding) { in dce110_stream_encoder_set_stream_attribute_helper()
553 struct dc_crtc_timing *crtc_timing, in dce110_stream_encoder_hdmi_set_stream_attribute() argument
566 cntl.color_depth = crtc_timing->display_color_depth; in dce110_stream_encoder_hdmi_set_stream_attribute()
572 dce110_stream_encoder_set_stream_attribute_helper(enc110, crtc_timing); in dce110_stream_encoder_hdmi_set_stream_attribute()
589 switch (crtc_timing->display_color_depth) { in dce110_stream_encoder_hdmi_set_stream_attribute()
594 if (crtc_timing->pixel_encoding == PIXEL_ENCODING_YCBCR422) { in dce110_stream_encoder_hdmi_set_stream_attribute()
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Ddce_link_encoder.c719 const struct dc_crtc_timing *crtc_timing) in dce110_link_encoder_validate_dvi_output() argument
734 if (crtc_timing->pixel_encoding != PIXEL_ENCODING_RGB) in dce110_link_encoder_validate_dvi_output()
741 crtc_timing->pix_clk_100hz > (TMDS_MAX_PIXEL_CLOCK * 10)) in dce110_link_encoder_validate_dvi_output()
743 if (crtc_timing->pix_clk_100hz < (TMDS_MIN_PIXEL_CLOCK * 10)) in dce110_link_encoder_validate_dvi_output()
746 if (crtc_timing->pix_clk_100hz > (max_pixel_clock * 10)) in dce110_link_encoder_validate_dvi_output()
750 switch (crtc_timing->display_color_depth) { in dce110_link_encoder_validate_dvi_output()
768 const struct dc_crtc_timing *crtc_timing, in dce110_link_encoder_validate_hdmi_output() argument
774 if (max_deep_color < crtc_timing->display_color_depth) in dce110_link_encoder_validate_hdmi_output()
777 if (crtc_timing->display_color_depth < COLOR_DEPTH_888) in dce110_link_encoder_validate_hdmi_output()
788 crtc_timing->pixel_encoding == PIXEL_ENCODING_YCBCR420) in dce110_link_encoder_validate_hdmi_output()
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Ddce_link_encoder.h216 const struct dc_crtc_timing *crtc_timing);
220 const struct dc_crtc_timing *crtc_timing);
224 const struct dc_crtc_timing *crtc_timing);
228 const struct dc_crtc_timing *crtc_timing);
/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_dio_stream_encoder.c488 struct dc_crtc_timing *crtc_timing, in enc3_stream_encoder_dvi_set_stream_attribute() argument
501 cntl.pixel_clock = crtc_timing->pix_clk_100hz / 10; in enc3_stream_encoder_dvi_set_stream_attribute()
526 ASSERT(crtc_timing->pixel_encoding == PIXEL_ENCODING_RGB); in enc3_stream_encoder_dvi_set_stream_attribute()
527 ASSERT(crtc_timing->display_color_depth == COLOR_DEPTH_888); in enc3_stream_encoder_dvi_set_stream_attribute()
528 enc1_stream_encoder_set_stream_attribute_helper(enc1, crtc_timing); in enc3_stream_encoder_dvi_set_stream_attribute()
534 struct dc_crtc_timing *crtc_timing, in enc3_stream_encoder_hdmi_set_stream_attribute() argument
573 enc1_stream_encoder_set_stream_attribute_helper(enc1, crtc_timing); in enc3_stream_encoder_hdmi_set_stream_attribute()
585 switch (crtc_timing->display_color_depth) { in enc3_stream_encoder_hdmi_set_stream_attribute()
590 if (crtc_timing->pixel_encoding == PIXEL_ENCODING_YCBCR422) { in enc3_stream_encoder_hdmi_set_stream_attribute()
601 if (crtc_timing->pixel_encoding == PIXEL_ENCODING_YCBCR422) { in enc3_stream_encoder_hdmi_set_stream_attribute()
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/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_stream_encoder.c248 struct dc_crtc_timing *crtc_timing, in enc1_stream_encoder_dp_set_stream_attribute() argument
267 struct dc_crtc_timing hw_crtc_timing = *crtc_timing; in enc1_stream_encoder_dp_set_stream_attribute()
476 struct dc_crtc_timing *crtc_timing) in enc1_stream_encoder_set_stream_attribute_helper() argument
478 switch (crtc_timing->pixel_encoding) { in enc1_stream_encoder_set_stream_attribute_helper()
492 struct dc_crtc_timing *crtc_timing, in enc1_stream_encoder_hdmi_set_stream_attribute() argument
510 enc1_stream_encoder_set_stream_attribute_helper(enc1, crtc_timing); in enc1_stream_encoder_hdmi_set_stream_attribute()
522 switch (crtc_timing->display_color_depth) { in enc1_stream_encoder_hdmi_set_stream_attribute()
528 if (crtc_timing->pixel_encoding == PIXEL_ENCODING_YCBCR422) { in enc1_stream_encoder_hdmi_set_stream_attribute()
543 if (crtc_timing->pixel_encoding == PIXEL_ENCODING_YCBCR422) { in enc1_stream_encoder_hdmi_set_stream_attribute()
576 } else if (crtc_timing->flags.LTE_340MCSC_SCRAMBLE) { in enc1_stream_encoder_hdmi_set_stream_attribute()
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Ddcn10_link_encoder.c571 const struct dc_crtc_timing *crtc_timing) in dcn10_link_encoder_validate_dvi_output() argument
586 if (crtc_timing->pixel_encoding != PIXEL_ENCODING_RGB) in dcn10_link_encoder_validate_dvi_output()
593 crtc_timing->pix_clk_100hz > (TMDS_MAX_PIXEL_CLOCK * 10)) in dcn10_link_encoder_validate_dvi_output()
595 if (crtc_timing->pix_clk_100hz < (TMDS_MIN_PIXEL_CLOCK * 10)) in dcn10_link_encoder_validate_dvi_output()
598 if (crtc_timing->pix_clk_100hz > (max_pixel_clock * 10)) in dcn10_link_encoder_validate_dvi_output()
602 switch (crtc_timing->display_color_depth) { in dcn10_link_encoder_validate_dvi_output()
620 const struct dc_crtc_timing *crtc_timing, in dcn10_link_encoder_validate_hdmi_output() argument
632 if (max_deep_color < crtc_timing->display_color_depth) in dcn10_link_encoder_validate_hdmi_output()
635 if (crtc_timing->display_color_depth < COLOR_DEPTH_888) in dcn10_link_encoder_validate_hdmi_output()
646 crtc_timing->pixel_encoding == PIXEL_ENCODING_YCBCR420) in dcn10_link_encoder_validate_hdmi_output()
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Ddcn10_link_encoder.h513 const struct dc_crtc_timing *crtc_timing);
517 const struct dc_crtc_timing *crtc_timing);
521 const struct dc_crtc_timing *crtc_timing);
525 const struct dc_crtc_timing *crtc_timing);
Ddcn10_stream_encoder.h597 struct dc_crtc_timing *crtc_timing,
604 struct dc_crtc_timing *crtc_timing,
610 struct dc_crtc_timing *crtc_timing,
677 struct dc_crtc_timing *crtc_timing);
/drivers/gpu/drm/amd/display/dc/inc/hw/
Dstream_encoder.h124 struct dc_crtc_timing *crtc_timing,
131 struct dc_crtc_timing *crtc_timing,
137 struct dc_crtc_timing *crtc_timing,
142 struct dc_crtc_timing *crtc_timing);
/drivers/gpu/drm/amd/display/dc/virtual/
Dvirtual_stream_encoder.c33 struct dc_crtc_timing *crtc_timing, in virtual_stream_encoder_dp_set_stream_attribute() argument
40 struct dc_crtc_timing *crtc_timing, in virtual_stream_encoder_hdmi_set_stream_attribute() argument
46 struct dc_crtc_timing *crtc_timing, in virtual_stream_encoder_dvi_set_stream_attribute() argument
/drivers/gpu/drm/amd/display/dc/core/
Ddc.c1366 struct dc_crtc_timing *crtc_timing) in dc_validate_seamless_boot_timing() argument
1416 if (crtc_timing->h_total != hw_crtc_timing.h_total) in dc_validate_seamless_boot_timing()
1419 if (crtc_timing->h_border_left != hw_crtc_timing.h_border_left) in dc_validate_seamless_boot_timing()
1422 if (crtc_timing->h_addressable != hw_crtc_timing.h_addressable) in dc_validate_seamless_boot_timing()
1425 if (crtc_timing->h_border_right != hw_crtc_timing.h_border_right) in dc_validate_seamless_boot_timing()
1428 if (crtc_timing->h_front_porch != hw_crtc_timing.h_front_porch) in dc_validate_seamless_boot_timing()
1431 if (crtc_timing->h_sync_width != hw_crtc_timing.h_sync_width) in dc_validate_seamless_boot_timing()
1434 if (crtc_timing->v_total != hw_crtc_timing.v_total) in dc_validate_seamless_boot_timing()
1437 if (crtc_timing->v_border_top != hw_crtc_timing.v_border_top) in dc_validate_seamless_boot_timing()
1440 if (crtc_timing->v_addressable != hw_crtc_timing.v_addressable) in dc_validate_seamless_boot_timing()
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Ddc_link_dp.c4980 bool is_edp_ilr_optimization_required(struct dc_link *link, struct dc_crtc_timing *crtc_timing) in is_edp_ilr_optimization_required() argument
4988 ASSERT(link || crtc_timing); // invalid input in is_edp_ilr_optimization_required()
5012 req_bw = dc_bandwidth_in_kbps_from_timing(crtc_timing); in is_edp_ilr_optimization_required()
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_stream_encoder.c538 struct dc_crtc_timing *crtc_timing, in enc2_stream_encoder_dp_set_stream_attribute() argument
546 crtc_timing, in enc2_stream_encoder_dp_set_stream_attribute()
Ddcn20_stream_encoder.h101 struct dc_crtc_timing *crtc_timing,
/drivers/gpu/drm/amd/display/dc/inc/
Ddc_link_dp.h103 bool is_edp_ilr_optimization_required(struct dc_link *link, struct dc_crtc_timing *crtc_timing);
/drivers/gpu/drm/amd/display/dc/
Ddc.h1052 struct dc_crtc_timing *crtc_timing);