| /drivers/gpu/drm/amd/display/include/ |
| D | logger_interface.h | 83 (void)(dc_ctx); \
89 (void)(dc_ctx); \
128 dm_dtn_log_begin(dc_ctx, log_ctx)
131 dm_dtn_log_append_v(dc_ctx, log_ctx, msg, ##__VA_ARGS__)
134 dm_dtn_log_end(dc_ctx, log_ctx)
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| /drivers/gpu/drm/amd/display/dc/dce/ |
| D | dmub_outbox.c | 38 struct dc_context *dc_ctx = dc->ctx; in dmub_enable_outbox_notification() local
48 dc_dmub_srv_cmd_queue(dc_ctx->dmub_srv, &cmd); in dmub_enable_outbox_notification()
49 dc_dmub_srv_cmd_execute(dc_ctx->dmub_srv); in dmub_enable_outbox_notification()
50 dc_dmub_srv_wait_idle(dc_ctx->dmub_srv); in dmub_enable_outbox_notification()
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| /drivers/gpu/drm/amd/display/dc/ |
| D | dc_dmub_srv.c | 68 struct dc_context *dc_ctx = dc_dmub_srv->ctx; in dc_dmub_srv_cmd_queue() local
95 struct dc_context *dc_ctx = dc_dmub_srv->ctx; in dc_dmub_srv_cmd_execute() local
108 struct dc_context *dc_ctx = dc_dmub_srv->ctx; in dc_dmub_srv_wait_idle() local
149 struct dc_context *dc_ctx = dc_dmub_srv->ctx; in dc_dmub_srv_wait_phy_init() local
192 struct dc_context *dc_ctx; in dc_dmub_srv_is_restore_required() local
200 dc_ctx = dc_dmub_srv->ctx; in dc_dmub_srv_is_restore_required()
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| /drivers/gpu/drm/amd/display/dc/core/ |
| D | dc.c | 752 struct dc_context *dc_ctx; in dc_construct_ctx() local
755 dc_ctx = kzalloc(sizeof(*dc_ctx), GFP_KERNEL); in dc_construct_ctx()
756 if (!dc_ctx) in dc_construct_ctx()
759 dc_ctx->cgs_device = init_params->cgs_device; in dc_construct_ctx()
760 dc_ctx->driver_context = init_params->driver; in dc_construct_ctx()
761 dc_ctx->dc = dc; in dc_construct_ctx()
762 dc_ctx->asic_id = init_params->asic_id; in dc_construct_ctx()
763 dc_ctx->dc_sink_id_count = 0; in dc_construct_ctx()
764 dc_ctx->dc_stream_id_count = 0; in dc_construct_ctx()
765 dc_ctx->dce_environment = init_params->dce_environment; in dc_construct_ctx()
[all …]
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| D | dc_link.c | 831 struct dc_context *dc_ctx = link->ctx; in dc_link_detect_helper() local
1002 !dc_ctx->dc->config.power_down_display_on_boot && in dc_link_detect_helper()
1386 struct dc_context *dc_ctx = init_params->ctx; in dc_link_construct() local
1394 DC_LOGGER_INIT(dc_ctx->logger); in dc_link_construct()
1406 link->ctx = dc_ctx; in dc_link_construct()
1518 panel_cntl_init_data.ctx = dc_ctx; in dc_link_construct()
1532 enc_init_data.ctx = dc_ctx; in dc_link_construct()
1533 bp_funcs->get_src_obj(dc_ctx->dc_bios, link->link_id, 0, in dc_link_construct()
1563 if (bp_funcs->get_device_tag(dc_ctx->dc_bios, in dc_link_construct()
1573 if (!bp_funcs->is_device_id_supported(dc_ctx->dc_bios, in dc_link_construct()
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| D | dc_resource.c | 1791 struct dc_context *dc_ctx = dc->ctx; in dc_remove_stream_from_ctx() local
2018 struct dc_context *dc_ctx = dc->ctx; in resource_map_pool_resources() local
2067 &context->res_ctx, pool, pipe_ctx->stream_res.stream_enc->id, dc_ctx->dce_version); in resource_map_pool_resources()
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| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_hw_sequencer_debug.c | 73 struct dc_context *dc_ctx = dc->ctx; in dcn10_get_hubbub_state() local
80 const uint32_t ref_clk_mhz = dc_ctx->dc->res_pool->ref_clocks.dchub_ref_clock_inKhz / 1000; in dcn10_get_hubbub_state()
111 struct dc_context *dc_ctx = dc->ctx; in dcn10_get_hubp_states() local
118 const uint32_t ref_clk_mhz = dc_ctx->dc->res_pool->ref_clocks.dchub_ref_clock_inKhz / 1000; in dcn10_get_hubp_states()
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| D | dcn10_hw_sequencer.c | 73 print_microsec(dc_ctx, log_ctx, ref_cycle)
80 void print_microsec(struct dc_context *dc_ctx, in print_microsec() argument
84 const uint32_t ref_clk_mhz = dc_ctx->dc->res_pool->ref_clocks.dchub_ref_clock_inKhz / 1000; in print_microsec()
124 struct dc_context *dc_ctx = dc->ctx; in log_mpc_crc() local
137 struct dc_context *dc_ctx = dc->ctx; in dcn10_log_hubbub_state() local
165 struct dc_context *dc_ctx = dc->ctx; in dcn10_log_hubp_states() local
280 struct dc_context *dc_ctx = dc->ctx; in dcn10_log_hw_state() local
1897 struct dc_context *dc_ctx, in wait_for_reset_trigger_to_occur() argument
2018 struct dc_context *dc_ctx = dc->ctx; in dcn10_align_pixel_clocks() local
2106 struct dc_context *dc_ctx = dc->ctx; in dcn10_enable_vblanks_synchronization() local
[all …]
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| /drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_resource.h | 169 enum dc_status dcn20_add_dsc_to_stream_resource(struct dc *dc, struct dc_state *dc_ctx, struct dc_s…
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| D | dcn20_resource.c | 1721 struct dc_state *dc_ctx, in dcn20_add_dsc_to_stream_resource() argument
1729 struct pipe_ctx *pipe_ctx = &dc_ctx->res_ctx.pipe_ctx[i]; in dcn20_add_dsc_to_stream_resource()
1737 dcn20_acquire_dsc(dc, &dc_ctx->res_ctx, &pipe_ctx->stream_res.dsc, i); in dcn20_add_dsc_to_stream_resource()
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| /drivers/gpu/drm/amd/display/dc/irq/dce110/ |
| D | irq_service_dce110.c | 206 struct dc_context *dc_ctx = irq_service->ctx; in dce110_vblank_set() local
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| /drivers/gpu/drm/amd/display/dc/dce110/ |
| D | dce110_hw_sequencer.c | 2399 struct dc_context *dc_ctx, in wait_for_reset_trigger_to_occur() argument
2442 struct dc_context *dc_ctx = dc->ctx; in dce110_enable_timing_synchronization() local
2468 wait_for_reset_trigger_to_occur(dc_ctx, grouped_pipes[i]->stream_res.tg); in dce110_enable_timing_synchronization()
2487 struct dc_context *dc_ctx = dc->ctx; in dce110_enable_per_frame_crtc_position_reset() local
2508 wait_for_reset_trigger_to_occur(dc_ctx, grouped_pipes[i]->stream_res.tg); in dce110_enable_per_frame_crtc_position_reset()
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| /drivers/gpu/drm/amd/display/amdgpu_dm/ |
| D | amdgpu_dm.c | 2483 struct dc_context *dc_ctx = link->ctx; in emulated_link_detect() local
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