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Searched refs:defaults (Results 1 – 25 of 28) sorted by relevance

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/drivers/net/ethernet/mellanox/mlx4/
Dsense.c66 enum mlx4_port_type *defaults) in mlx4_do_sense_ports() argument
78 stype[i - 1] = defaults[i - 1]; in mlx4_do_sense_ports()
80 stype[i - 1] = defaults[i - 1]; in mlx4_do_sense_ports()
87 stype[i] = stype[i] ? stype[i] : defaults[i]; in mlx4_do_sense_ports()
Dmlx4.h1238 enum mlx4_port_type *defaults);
/drivers/media/rc/img-ir/
Dimg-ir-hw.c101 struct img_ir_timing_range *defaults) in img_ir_timing_defaults() argument
104 range->min = defaults->min; in img_ir_timing_defaults()
106 range->max = defaults->max; in img_ir_timing_defaults()
110 struct img_ir_symbol_timing *defaults) in img_ir_symbol_timing_defaults() argument
112 img_ir_timing_defaults(&timing->pulse, &defaults->pulse); in img_ir_symbol_timing_defaults()
113 img_ir_timing_defaults(&timing->space, &defaults->space); in img_ir_symbol_timing_defaults()
117 struct img_ir_timings *defaults) in img_ir_timings_defaults() argument
119 img_ir_symbol_timing_defaults(&timings->ldr, &defaults->ldr); in img_ir_timings_defaults()
120 img_ir_symbol_timing_defaults(&timings->s00, &defaults->s00); in img_ir_timings_defaults()
121 img_ir_symbol_timing_defaults(&timings->s01, &defaults->s01); in img_ir_timings_defaults()
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/drivers/gpu/drm/i915/gt/
Dselftest_lrc.c917 u32 *defaults; in store_context() local
929 defaults = shmem_pin_map(ce->engine->default_state); in store_context()
930 if (!defaults) { in store_context()
938 hw = defaults; in store_context()
969 shmem_unpin_map(ce->engine->default_state, defaults); in store_context()
1081 u32 *defaults; in load_context() local
1093 defaults = shmem_pin_map(ce->engine->default_state); in load_context()
1094 if (!defaults) { in load_context()
1101 hw = defaults; in load_context()
1129 shmem_unpin_map(ce->engine->default_state, defaults); in load_context()
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Dsysfs_engines.c195 return sprintf(buf, "%lu\n", engine->defaults.max_busywait_duration_ns); in max_spin_default()
248 return sprintf(buf, "%lu\n", engine->defaults.timeslice_duration_ms); in timeslice_default()
298 return sprintf(buf, "%lu\n", engine->defaults.stop_timeout_ms); in stop_default()
354 return sprintf(buf, "%lu\n", engine->defaults.preempt_timeout_ms); in preempt_timeout_default()
408 return sprintf(buf, "%lu\n", engine->defaults.heartbeat_interval_ms); in heartbeat_default()
Dselftest_engine_heartbeat.c17 engine->defaults.heartbeat_interval_ms); in reset_heartbeat()
406 engine->defaults.heartbeat_interval_ms; in st_engine_heartbeat_enable()
428 engine->defaults.heartbeat_interval_ms; in st_engine_heartbeat_enable_no_pm()
Dintel_engine_types.h533 } props, defaults; member
Dintel_engine_cs.c355 engine->defaults = engine->props; /* never to change again */ in intel_engine_setup()
1685 read_ul(&engine->defaults, p->offset)); in print_properties()
/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Diceland_smumgr.c309 const struct iceland_pt_defaults *defaults = smu_data->power_tune_defaults; in iceland_populate_svi_load_line() local
311 smu_data->power_tune_table.SviLoadLineEn = defaults->svi_load_line_en; in iceland_populate_svi_load_line()
312 smu_data->power_tune_table.SviLoadLineVddC = defaults->svi_load_line_vddc; in iceland_populate_svi_load_line()
323 const struct iceland_pt_defaults *defaults = smu_data->power_tune_defaults; in iceland_populate_tdc_limit() local
329 defaults->tdc_vddc_throttle_release_limit_perc; in iceland_populate_tdc_limit()
330 smu_data->power_tune_table.TDC_MAWt = defaults->tdc_mawt; in iceland_populate_tdc_limit()
338 const struct iceland_pt_defaults *defaults = smu_data->power_tune_defaults; in iceland_populate_dw8() local
349 smu_data->power_tune_table.TdcWaterfallCtl = defaults->tdc_waterfall_ctl; in iceland_populate_dw8()
1853 const struct iceland_pt_defaults *defaults = smu_data->power_tune_defaults; in iceland_populate_bapm_parameters_in_dpm_table() local
1875 dpm_table->DTEAmbientTempBase = defaults->dte_ambient_temp_base; in iceland_populate_bapm_parameters_in_dpm_table()
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Dvegam_smumgr.c1443 const struct vegam_pt_defaults *defaults = smu_data->power_tune_defaults; in vegam_populate_bapm_parameters_in_dpm_table() local
1470 pdef1 = defaults->BAPMTI_R; in vegam_populate_bapm_parameters_in_dpm_table()
1471 pdef2 = defaults->BAPMTI_RC; in vegam_populate_bapm_parameters_in_dpm_table()
1734 const struct vegam_pt_defaults *defaults = smu_data->power_tune_defaults; in vegam_populate_svi_load_line() local
1736 smu_data->power_tune_table.SviLoadLineEn = defaults->SviLoadLineEn; in vegam_populate_svi_load_line()
1737 smu_data->power_tune_table.SviLoadLineVddC = defaults->SviLoadLineVddC; in vegam_populate_svi_load_line()
1750 const struct vegam_pt_defaults *defaults = smu_data->power_tune_defaults; in vegam_populate_tdc_limit() local
1756 defaults->TDC_VDDC_ThrottleReleaseLimitPerc; in vegam_populate_tdc_limit()
1757 smu_data->power_tune_table.TDC_MAWt = defaults->TDC_MAWt; in vegam_populate_tdc_limit()
1765 const struct vegam_pt_defaults *defaults = smu_data->power_tune_defaults; in vegam_populate_dw8() local
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Dci_smumgr.c515 const struct ci_pt_defaults *defaults = smu_data->power_tune_defaults; in ci_populate_svi_load_line() local
517 smu_data->power_tune_table.SviLoadLineEn = defaults->svi_load_line_en; in ci_populate_svi_load_line()
518 smu_data->power_tune_table.SviLoadLineVddC = defaults->svi_load_line_vddc; in ci_populate_svi_load_line()
529 const struct ci_pt_defaults *defaults = smu_data->power_tune_defaults; in ci_populate_tdc_limit() local
535 defaults->tdc_vddc_throttle_release_limit_perc; in ci_populate_tdc_limit()
536 smu_data->power_tune_table.TDC_MAWt = defaults->tdc_mawt; in ci_populate_tdc_limit()
544 const struct ci_pt_defaults *defaults = smu_data->power_tune_defaults; in ci_populate_dw8() local
555 smu_data->power_tune_table.TdcWaterfallCtl = defaults->tdc_waterfall_ctl; in ci_populate_dw8()
718 const struct ci_pt_defaults *defaults = smu_data->power_tune_defaults; in ci_populate_bapm_parameters_in_dpm_table() local
732 dpm_table->DTEAmbientTempBase = defaults->dte_ambient_temp_base; in ci_populate_bapm_parameters_in_dpm_table()
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Dtonga_smumgr.c1830 const struct tonga_pt_defaults *defaults = smu_data->power_tune_defaults; in tonga_populate_bapm_parameters_in_dpm_table() local
1850 dpm_table->DTEAmbientTempBase = defaults->dte_ambient_temp_base; in tonga_populate_bapm_parameters_in_dpm_table()
1853 PP_HOST_TO_SMC_UL(defaults->bapm_temp_gradient); in tonga_populate_bapm_parameters_in_dpm_table()
1854 pdef1 = defaults->bapmti_r; in tonga_populate_bapm_parameters_in_dpm_table()
1855 pdef2 = defaults->bapmti_rc; in tonga_populate_bapm_parameters_in_dpm_table()
1877 const struct tonga_pt_defaults *defaults = smu_data->power_tune_defaults; in tonga_populate_svi_load_line() local
1879 smu_data->power_tune_table.SviLoadLineEn = defaults->svi_load_line_en; in tonga_populate_svi_load_line()
1880 smu_data->power_tune_table.SviLoadLineVddC = defaults->svi_load_line_vddC; in tonga_populate_svi_load_line()
1892 const struct tonga_pt_defaults *defaults = smu_data->power_tune_defaults; in tonga_populate_tdc_limit() local
1903 defaults->tdc_vddc_throttle_release_limit_perc; in tonga_populate_tdc_limit()
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Dfiji_smumgr.c488 const struct fiji_pt_defaults *defaults = smu_data->power_tune_defaults; in fiji_populate_bapm_parameters_in_dpm_table() local
514 dpm_table->DTEAmbientTempBase = defaults->DTEAmbientTempBase; in fiji_populate_bapm_parameters_in_dpm_table()
571 const struct fiji_pt_defaults *defaults = smu_data->power_tune_defaults; in fiji_populate_svi_load_line() local
573 smu_data->power_tune_table.SviLoadLineEn = defaults->SviLoadLineEn; in fiji_populate_svi_load_line()
574 smu_data->power_tune_table.SviLoadLineVddC = defaults->SviLoadLineVddC; in fiji_populate_svi_load_line()
588 const struct fiji_pt_defaults *defaults = smu_data->power_tune_defaults; in fiji_populate_tdc_limit() local
597 defaults->TDC_VDDC_ThrottleReleaseLimitPerc; in fiji_populate_tdc_limit()
598 smu_data->power_tune_table.TDC_MAWt = defaults->TDC_MAWt; in fiji_populate_tdc_limit()
606 const struct fiji_pt_defaults *defaults = smu_data->power_tune_defaults; in fiji_populate_dw8() local
617 smu_data->power_tune_table.TdcWaterfallCtl = defaults->TdcWaterfallCtl; in fiji_populate_dw8()
Dpolaris10_smumgr.c431 const struct polaris10_pt_defaults *defaults = smu_data->power_tune_defaults; in polaris10_populate_bapm_parameters_in_dpm_table() local
458 pdef1 = defaults->BAPMTI_R; in polaris10_populate_bapm_parameters_in_dpm_table()
459 pdef2 = defaults->BAPMTI_RC; in polaris10_populate_bapm_parameters_in_dpm_table()
493 const struct polaris10_pt_defaults *defaults = smu_data->power_tune_defaults; in polaris10_populate_svi_load_line() local
495 smu_data->power_tune_table.SviLoadLineEn = defaults->SviLoadLineEn; in polaris10_populate_svi_load_line()
496 smu_data->power_tune_table.SviLoadLineVddC = defaults->SviLoadLineVddC; in polaris10_populate_svi_load_line()
509 const struct polaris10_pt_defaults *defaults = smu_data->power_tune_defaults; in polaris10_populate_tdc_limit() local
515 defaults->TDC_VDDC_ThrottleReleaseLimitPerc; in polaris10_populate_tdc_limit()
516 smu_data->power_tune_table.TDC_MAWt = defaults->TDC_MAWt; in polaris10_populate_tdc_limit()
524 const struct polaris10_pt_defaults *defaults = smu_data->power_tune_defaults; in polaris10_populate_dw8() local
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/drivers/net/wan/lmc/
Dlmc_media.c97 .defaults = lmc_ds3_default, /* reset to default state */
112 .defaults = lmc_hssi_default, /* reset to default state */
127 .defaults = lmc_ssi_default, /* reset to default state */
142 .defaults = lmc_t1_default, /* reset to default state */
Dlmc_var.h207 void (* defaults)(lmc_softc_t * const); member
Dlmc_main.c911 sc->lmc_media->defaults (sc); in lmc_init_one()
/drivers/mtd/nand/
Dcore.c223 engine_type = nand->ecc.defaults.engine_type; in nanddev_get_ecc_engine()
Decc.c593 algo = nand->ecc.defaults.algo; in nand_ecc_get_sw_engine()
/drivers/pci/pcie/
DKconfig89 Use the BIOS defaults for PCI Express ASPM.
/drivers/scsi/
Dsd.c2712 goto defaults; in sd_read_cache_type()
2715 goto defaults; in sd_read_cache_type()
2779 goto defaults; in sd_read_cache_type()
2795 goto defaults; in sd_read_cache_type()
2801 goto defaults; in sd_read_cache_type()
2849 defaults: in sd_read_cache_type()
/drivers/pci/
DKconfig215 Use the BIOS defaults; don't touch MPS at all. This is the same
/drivers/rpmsg/
Dqcom_glink_native.c1181 __be32 defaults[] = { cpu_to_be32(SZ_1K), cpu_to_be32(5) }; in qcom_glink_announce_create() local
1184 __be32 *val = defaults; in qcom_glink_announce_create()
/drivers/mtd/nand/spi/
Dcore.c1224 nand->ecc.defaults.engine_type = NAND_ECC_ENGINE_TYPE_ON_DIE; in spinand_init()
/drivers/message/fusion/lsi/
Dmpi_history.txt414 * 01-15-05 01.05.06 Added defaults for data scrub rate and resync rate to

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