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Searched refs:dev_cfg (Results 1 – 5 of 5) sorted by relevance

/drivers/crypto/qat/qat_common/
Dadf_cfg.c15 struct adf_cfg_device_data *dev_cfg = sfile->private; in qat_dev_cfg_start() local
18 return seq_list_start(&dev_cfg->sec_list, *pos); in qat_dev_cfg_start()
38 struct adf_cfg_device_data *dev_cfg = sfile->private; in qat_dev_cfg_next() local
40 return seq_list_next(v, &dev_cfg->sec_list, pos); in qat_dev_cfg_next()
/drivers/vdpa/ifcvf/
Difcvf_base.c146 hw->dev_cfg = get_cap_addr(hw, &cap); in ifcvf_init_hw()
147 IFCVF_DBG(pdev, "hw->dev_cfg = %p\n", hw->dev_cfg); in ifcvf_init_hw()
156 hw->isr == NULL || hw->dev_cfg == NULL) { in ifcvf_init_hw()
177 hw->dev_cfg, hw->notify_off_multiplier); in ifcvf_init_hw()
277 *p++ = ifc_ioread8(hw->dev_cfg + offset + i); in ifcvf_read_dev_config()
292 ifc_iowrite8(*p++, hw->dev_cfg + offset + i); in ifcvf_write_dev_config()
Difcvf_base.h74 void __iomem *dev_cfg; member
/drivers/media/platform/cadence/
Dcdns-csi2rx.c284 u32 dev_cfg; in csi2rx_get_resources() local
325 dev_cfg = readl(csi2rx->base + CSI2RX_DEVICE_CFG_REG); in csi2rx_get_resources()
328 csi2rx->max_lanes = dev_cfg & 7; in csi2rx_get_resources()
335 csi2rx->max_streams = (dev_cfg >> 4) & 7; in csi2rx_get_resources()
342 csi2rx->has_internal_dphy = dev_cfg & BIT(3) ? true : false; in csi2rx_get_resources()
Dcdns-csi2tx.c438 u32 dev_cfg; in csi2tx_get_resources() local
464 dev_cfg = readl(csi2tx->base + CSI2TX_DEVICE_CONFIG_REG); in csi2tx_get_resources()
467 csi2tx->max_lanes = dev_cfg & CSI2TX_DEVICE_CONFIG_LANES_MASK; in csi2tx_get_resources()
474 csi2tx->max_streams = (dev_cfg & CSI2TX_DEVICE_CONFIG_STREAMS_MASK) >> 4; in csi2tx_get_resources()
481 csi2tx->has_internal_dphy = !!(dev_cfg & CSI2TX_DEVICE_CONFIG_HAS_DPHY); in csi2tx_get_resources()