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Searched refs:dmac_15_0 (Results 1 – 11 of 11) sorted by relevance

/drivers/net/ethernet/mellanox/mlx5/core/steering/
Dmlx5_ifc_dr.h187 u8 dmac_15_0[0x10]; member
220 u8 dmac_15_0[0x10]; member
278 u8 dmac_15_0[0x10]; member
522 u8 dmac_15_0[0x10]; member
Dmlx5_ifc_dr_ste_v1.h219 u8 dmac_15_0[0x10]; member
240 u8 dmac_15_0[0x10]; member
286 u8 dmac_15_0[0x10]; member
Ddr_ste_v0.c642 hdr_fld_2b = MLX5_GET(l2_hdr, l2_hdr, dmac_15_0); in dr_ste_v0_set_action_decap_l3_list()
707 DR_STE_SET_TAG(eth_l2_src_dst, bit_mask, dmac_15_0, mask, dmac_15_0); in dr_ste_v0_build_eth_l2_src_dst_bit_mask()
740 DR_STE_SET_TAG(eth_l2_src_dst, tag, dmac_15_0, spec, dmac_15_0); in dr_ste_v0_build_eth_l2_src_dst_tag()
1032 DR_STE_SET_TAG(eth_l2_dst, bit_mask, dmac_15_0, mask, dmac_15_0); in dr_ste_v0_build_eth_l2_dst_bit_mask()
1045 DR_STE_SET_TAG(eth_l2_dst, tag, dmac_15_0, spec, dmac_15_0); in dr_ste_v0_build_eth_l2_dst_tag()
1069 DR_STE_SET_TAG(eth_l2_tnl, bit_mask, dmac_15_0, mask, dmac_15_0); in dr_ste_v0_build_eth_l2_tnl_bit_mask()
1099 DR_STE_SET_TAG(eth_l2_tnl, tag, dmac_15_0, spec, dmac_15_0); in dr_ste_v0_build_eth_l2_tnl_tag()
Ddr_ste_v1.c922 DR_STE_SET_TAG(eth_l2_src_dst_v1, bit_mask, dmac_15_0, mask, dmac_15_0); in dr_ste_v1_build_eth_l2_src_dst_bit_mask()
948 DR_STE_SET_TAG(eth_l2_src_dst_v1, tag, dmac_15_0, spec, dmac_15_0); in dr_ste_v1_build_eth_l2_src_dst_tag()
1217 DR_STE_SET_TAG(eth_l2_dst_v1, bit_mask, dmac_15_0, mask, dmac_15_0); in dr_ste_v1_build_eth_l2_dst_bit_mask()
1229 DR_STE_SET_TAG(eth_l2_dst_v1, tag, dmac_15_0, spec, dmac_15_0); in dr_ste_v1_build_eth_l2_dst_tag()
1251 DR_STE_SET_TAG(eth_l2_tnl_v1, bit_mask, dmac_15_0, mask, dmac_15_0); in dr_ste_v1_build_eth_l2_tnl_bit_mask()
1280 DR_STE_SET_TAG(eth_l2_tnl_v1, tag, dmac_15_0, spec, dmac_15_0); in dr_ste_v1_build_eth_l2_tnl_tag()
Ddr_matcher.c13 return (spec->dmac_47_16 || spec->dmac_15_0); in dr_mask_is_dmac_set()
52 (_spec).svlan_tag || (_spec).dmac_47_16 || (_spec).dmac_15_0 || \
Ddr_ste.c764 spec->dmac_15_0 = MLX5_GET(fte_match_set_lyr_2_4, mask, dmac_15_0); in dr_ste_copy_mask_spec()
Ddr_types.h512 u32 dmac_15_0:16; /* Destination MAC address of incoming packet */ member
/drivers/net/ethernet/mellanox/mlx5/core/diag/
Dfs_tracepoint.c75 MLX5_GET(fte_match_set_lyr_2_4, mask, dmac_15_0), in print_lyr_2_4_hdrs()
77 MLX5_GET(fte_match_set_lyr_2_4, value, dmac_15_0)}; in print_lyr_2_4_hdrs()
/drivers/net/ethernet/mellanox/mlx5/core/esw/
Dbridge.c241 MLX5_SET_TO_ONES(fte_match_param, match, outer_headers.dmac_15_0); in mlx5_esw_bridge_egress_vlan_fg_create()
274 MLX5_SET_TO_ONES(fte_match_param, match, outer_headers.dmac_15_0); in mlx5_esw_bridge_egress_mac_fg_create()
/drivers/net/ethernet/mellanox/mlx5/core/fpga/
Dipsec.c648 MLX5_GET(fte_match_set_lyr_2_4, outer_c, dmac_15_0); in mlx5_is_fpga_egress_ipsec_rule()
/drivers/net/ethernet/mellanox/mlx5/core/
Den_tc.c2739 OFFLOAD(DMAC_15_0, 16, U16_MAX, eth.h_dest[4], 0, dmac_15_0),