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Searched refs:dmactrl (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/host1x/hw/
Ddebug_hw_1x06.c20 u32 dmaput, dmaget, dmactrl; in host1x_debug_show_channel_cdma() local
38 dmactrl = host1x_ch_readl(ch, HOST1X_CHANNEL_DMACTRL); in host1x_debug_show_channel_cdma()
45 if (dmactrl & HOST1X_CHANNEL_DMACTRL_DMASTOP || in host1x_debug_show_channel_cdma()
59 dmaput, dmaget, dmactrl); in host1x_debug_show_channel_cdma()
Ddebug_hw_1x01.c20 u32 dmaput, dmaget, dmactrl; in host1x_debug_show_channel_cdma() local
28 dmactrl = host1x_ch_readl(ch, HOST1X_CHANNEL_DMACTRL); in host1x_debug_show_channel_cdma()
34 if (HOST1X_CHANNEL_DMACTRL_DMASTOP_V(dmactrl) || in host1x_debug_show_channel_cdma()
64 dmaput, dmaget, dmactrl); in host1x_debug_show_channel_cdma()
/drivers/usb/gadget/udc/
Dgr_udc.c368 u32 dmactrl; in gr_start_dma() local
395 dmactrl = gr_read32(&ep->regs->dmactrl); in gr_start_dma()
396 gr_write32(&ep->regs->dmactrl, dmactrl | GR_DMACTRL_DA); in gr_start_dma()
424 u32 dmactrl; in gr_abort_dma() local
426 dmactrl = gr_read32(&ep->regs->dmactrl); in gr_abort_dma()
427 gr_write32(&ep->regs->dmactrl, dmactrl | GR_DMACTRL_AD); in gr_abort_dma()
674 gr_write32(&ep->regs->dmactrl, 0); in gr_ep_reset()
1304 ep_dmactrl = gr_read32(&ep->regs->dmactrl); in gr_handle_out_ep()
1305 gr_write32(&ep->regs->dmactrl, ep_dmactrl | GR_DMACTRL_DA); in gr_handle_out_ep()
1436 if (gr_read32(&ep->regs->dmactrl) & GR_DMACTRL_AE) { in gr_irq_handler()
[all …]
Dgr_udc.h30 u32 dmactrl; member
/drivers/isdn/hardware/mISDN/
Dnetjet.c80 u8 dmactrl; member
213 card->dmactrl = 0; in mode_tiger()
214 outb(card->dmactrl, card->base + NJ_DMACTRL); in mode_tiger()
231 if (!card->dmactrl) { in mode_tiger()
232 card->dmactrl = 1; in mode_tiger()
233 outb(card->dmactrl, card->base + NJ_DMACTRL); in mode_tiger()
247 if (!card->dmactrl) { in mode_tiger()
248 card->dmactrl = 1; in mode_tiger()
249 outb(card->dmactrl, card->base + NJ_DMACTRL); in mode_tiger()
289 card->dmactrl = 0; in nj_reset()
/drivers/net/ethernet/freescale/
Dgianfar.c1023 tempval = gfar_read(&regs->dmactrl); in gfar_halt_nodisable()
1025 gfar_write(&regs->dmactrl, tempval); in gfar_halt_nodisable()
1185 tempval = gfar_read(&regs->dmactrl); in gfar_start()
1187 gfar_write(&regs->dmactrl, tempval); in gfar_start()
1190 tempval = gfar_read(&regs->dmactrl); in gfar_start()
1192 gfar_write(&regs->dmactrl, tempval); in gfar_start()
3479 tempval = gfar_read(&regs->dmactrl); in gfar_start_wol_filer()
3481 gfar_write(&regs->dmactrl, tempval); in gfar_start_wol_filer()
3484 tempval = gfar_read(&regs->dmactrl); in gfar_start_wol_filer()
3486 gfar_write(&regs->dmactrl, tempval); in gfar_start_wol_filer()
Dgianfar.h709 u32 dmactrl; /* 0x.02c - DMA Control Register */ member