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Searched refs:dpcd_caps (Results 1 – 13 of 13) sorted by relevance

/drivers/gpu/drm/amd/display/dc/core/
Ddc_link_dp.c98 if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_12) { in get_eq_training_aux_rd_interval()
193 struct dpcd_caps *dpcd_caps = &link->dpcd_caps; in decide_eq_training_pattern() local
212 if (dpcd_caps->max_down_spread.bits.TPS4_SUPPORTED && in decide_eq_training_pattern()
216 if (dpcd_caps->max_ln_count.bits.TPS3_SUPPORTED && in decide_eq_training_pattern()
246 link->dpcd_caps.max_ln_count.bits.POST_LT_ADJ_REQ_SUPPORTED; in dpcd_set_link_settings()
255 if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_14 && in dpcd_set_link_settings()
1026 link->dpcd_caps.lttpr_caps.aux_rd_interval[offset - 1]); in perform_channel_equalization_sequence()
1196 if (link->dpcd_caps.max_ln_count.bits.POST_LT_ADJ_REQ_SUPPORTED != 1 || in dp_transition_to_video_idle()
1416 link->dpcd_caps.lttpr_caps.mode = repeater_mode; in configure_lttpr_mode_non_transparent()
1430 link->dpcd_caps.lttpr_caps.mode = repeater_mode; in configure_lttpr_mode_non_transparent()
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Ddc_link_ddc.c298 if (link->dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_VGA_CONVERTER && in defer_delay_converter_wa()
299 link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_0080E1 && in defer_delay_converter_wa()
300 !memcmp(link->dpcd_caps.branch_dev_name, in defer_delay_converter_wa()
302 sizeof(link->dpcd_caps.branch_dev_name))) in defer_delay_converter_wa()
307 if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_0080E1 && in defer_delay_converter_wa()
308 !memcmp(link->dpcd_caps.branch_dev_name, in defer_delay_converter_wa()
310 sizeof(link->dpcd_caps.branch_dev_name))) in defer_delay_converter_wa()
313 if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_006037 && in defer_delay_converter_wa()
314 !memcmp(link->dpcd_caps.branch_dev_name, in defer_delay_converter_wa()
316 sizeof(link->dpcd_caps.branch_dev_name))) in defer_delay_converter_wa()
Ddc_link.c685 if (link_rate_set < link->dpcd_caps.edp_supported_link_rates_count) { in read_current_link_settings_on_detect()
687 link->dpcd_caps.edp_supported_link_rates[link_rate_set]; in read_current_link_settings_on_detect()
745 link->dpcd_caps.dongle_type = sink_caps->dongle_type; in detect_dp()
746 link->dpcd_caps.dpcd_rev.raw = 0; in detect_dp()
834 struct dpcd_caps prev_dpcd_caps; in dc_link_detect_helper()
868 memcpy(&prev_dpcd_caps, &link->dpcd_caps, sizeof(struct dpcd_caps)); in dc_link_detect_helper()
980 link->dpcd_caps.sink_count.bits.SINK_COUNT == 0) { in dc_link_detect_helper()
990 (link->dpcd_caps.dongle_type != in dc_link_detect_helper()
1022 if (link->dpcd_caps.sink_count.bits.SINK_COUNT) in dc_link_detect_helper()
1024 link->dpcd_caps.sink_count.bits.SINK_COUNT; in dc_link_detect_helper()
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Ddc_link_hwss.c48 return (convert_to_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt) == offset); in is_immediate_downstream()
Ddc.c258 link->link_status.dpcd_caps = &link->dpcd_caps; in create_links()
1482 if (link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED) { in dc_validate_seamless_boot_timing()
/drivers/gpu/drm/amd/display/dc/
Ddc_link.h41 struct dpcd_caps *dpcd_caps; member
161 struct dpcd_caps dpcd_caps; member
Ddc.h1115 struct dpcd_caps { struct
/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_mst_types.c183 if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_90CC24 && in needs_dsc_aux_workaround()
184 (link->dpcd_caps.dpcd_rev.raw == DPCD_REV_14 || link->dpcd_caps.dpcd_rev.raw == DPCD_REV_12) && in needs_dsc_aux_workaround()
185 link->dpcd_caps.sink_count.bits.SINK_COUNT >= 2) in needs_dsc_aux_workaround()
196 if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_90CC24 && in is_synaptics_cascaded_panamera()
197 IS_SYNAPTICS_CASCADED_PANAMERA(link->dpcd_caps.branch_dev_name, branch_vendor_data)) { in is_synaptics_cascaded_panamera()
Damdgpu_dm_psr.c49 link->dpcd_caps.psr_caps.psr_version = dpcd_data[0]; in amdgpu_dm_set_psr_caps()
Damdgpu_dm_debugfs.c1131 struct dpcd_caps dpcd_caps; in dp_dsc_fec_support_show() local
1151 dpcd_caps = aconnector->dc_link->dpcd_caps; in dp_dsc_fec_support_show()
1163 is_fec_supported = dpcd_caps.fec_cap.raw & 0x1; in dp_dsc_fec_support_show()
1164 is_dsc_supported = dpcd_caps.dsc_caps.dsc_basic_caps.raw[0] & 0x1; in dp_dsc_fec_support_show()
Damdgpu_dm_hdcp.c475 link->dp.rev = aconnector->dc_link->dpcd_caps.dpcd_rev.raw; in update_config()
Damdgpu_dm.c146 switch (link->dpcd_caps.dongle_type) { in get_subconnector_type()
3149 if (link_status->dpcd_caps->dpcd_rev.raw < 0x12) { in dm_handle_mst_sideband_msg()
6095 aconnector->dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.raw, in update_dsc_caps()
6096 aconnector->dc_link->dpcd_caps.dsc_caps.dsc_branch_decoder_caps.raw, in update_dsc_caps()
6393 if (stream->link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED) in create_stream_for_sink()
/drivers/gpu/drm/amd/display/dc/hdcp/
Dhdcp_msg.c341 (link->dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_VGA_CONVERTER || in get_protection_properties_by_signal()
342 link->dpcd_caps.dongle_caps.dongle_type == DISPLAY_DONGLE_DP_VGA_CONVERTER)) { in get_protection_properties_by_signal()