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Searched refs:dpll_reg (Results 1 – 3 of 3) sorted by relevance

/drivers/video/fbdev/intelfb/
Dintelfbhw.c1283 u32 dpll_reg, fp0_reg, fp1_reg, pipe_conf_reg, pipe_stat_reg; in intelfbhw_program_mode() local
1314 dpll_reg = DPLL_B; in intelfbhw_program_mode()
1338 dpll_reg = DPLL_A; in intelfbhw_program_mode()
1398 tmp = INREG(dpll_reg); in intelfbhw_program_mode()
1400 OUTREG(dpll_reg, tmp); in intelfbhw_program_mode()
1407 OUTREG(dpll_reg, *dpll); in intelfbhw_program_mode()
/drivers/gpu/drm/gma500/
Dcdv_intel_display.c219 int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B; in cdv_dpll_set_clock_cdv() local
226 REG_WRITE(dpll_reg, DPLL_SYNCLOCK_ENABLE | DPLL_VGA_MODE_DIS); in cdv_dpll_set_clock_cdv()
/drivers/gpu/drm/i915/display/
Dintel_display.c583 i915_reg_t dpll_reg; in vlv_wait_port_ready() local
588 dpll_reg = DPLL(0); in vlv_wait_port_ready()
592 dpll_reg = DPLL(0); in vlv_wait_port_ready()
597 dpll_reg = DPIO_PHY_STATUS; in vlv_wait_port_ready()
603 if (intel_de_wait_for_register(dev_priv, dpll_reg, in vlv_wait_port_ready()
608 intel_de_read(dev_priv, dpll_reg) & port_mask, in vlv_wait_port_ready()