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Searched refs:dpm_table_start (Results 1 – 17 of 17) sorted by relevance

/drivers/gpu/drm/radeon/
Dkv_dpm.c308 pi->dpm_table_start = tmp; in kv_process_firmware_header()
328 pi->dpm_table_start + in kv_enable_dpm_voltage_scaling()
344 pi->dpm_table_start + in kv_set_dpm_interval()
358 pi->dpm_table_start + in kv_set_dpm_boot_state()
549 pi->dpm_table_start + in kv_update_sclk_t()
598 pi->dpm_table_start + in kv_enable_auto_thermal_throttling()
612 pi->dpm_table_start + in kv_upload_dpm_settings()
622 pi->dpm_table_start + in kv_upload_dpm_settings()
703 pi->dpm_table_start + in kv_populate_uvd_table()
713 pi->dpm_table_start + in kv_populate_uvd_table()
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Dkv_dpm.h122 u32 dpm_table_start; member
Dci_dpm.h218 u32 dpm_table_start; member
Dci_dpm.c1304 pi->dpm_table_start + in ci_update_sclk_t()
1793 pi->dpm_table_start = tmp; in ci_process_firmware_header()
3244 u32 level_array_address = pi->dpm_table_start + in ci_populate_all_graphic_levels()
3291 u32 level_array_address = pi->dpm_table_start + in ci_populate_all_memory_levels()
3656 pi->dpm_table_start + in ci_init_smc_table()
/drivers/gpu/drm/amd/pm/powerplay/
Dkv_dpm.c593 pi->dpm_table_start = tmp; in kv_process_firmware_header()
613 pi->dpm_table_start + in kv_enable_dpm_voltage_scaling()
629 pi->dpm_table_start + in kv_set_dpm_interval()
643 pi->dpm_table_start + in kv_set_dpm_boot_state()
790 pi->dpm_table_start + in kv_update_sclk_t()
839 pi->dpm_table_start + in kv_enable_auto_thermal_throttling()
853 pi->dpm_table_start + in kv_upload_dpm_settings()
863 pi->dpm_table_start + in kv_upload_dpm_settings()
944 pi->dpm_table_start + in kv_populate_uvd_table()
954 pi->dpm_table_start + in kv_populate_uvd_table()
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Dkv_dpm.h148 u32 dpm_table_start; member
/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dpolaris10_smumgr.c123 uint32_t dpm_table_start; in polaris10_setup_graphics_level_structure() local
133 &dpm_table_start, 0x40000), in polaris10_setup_graphics_level_structure()
140 vr_config_address = dpm_table_start + offsetof(SMU74_Discrete_DpmTable, VRConfig); in polaris10_setup_graphics_level_structure()
147 graphics_level_address = dpm_table_start + offsetof(SMU74_Discrete_DpmTable, GraphicsLevel); in polaris10_setup_graphics_level_structure()
155 graphics_level_address = dpm_table_start + offsetof(SMU74_Discrete_DpmTable, MemoryLevel); in polaris10_setup_graphics_level_structure()
164 graphics_level_address = dpm_table_start + offsetof(SMU74_Discrete_DpmTable, BootMVdd); in polaris10_setup_graphics_level_structure()
1046 uint32_t array = smu_data->smu7_data.dpm_table_start + in polaris10_populate_all_graphic_levels()
1215 uint32_t array = smu_data->smu7_data.dpm_table_start + in polaris10_populate_all_memory_levels()
2119 smu_data->smu7_data.dpm_table_start + in polaris10_init_smc_table()
2292 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + offsetof(SMU74_Discrete_DpmTable, in polaris10_update_uvd_smc_table()
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Dci_smumgr.h63 uint32_t dpm_table_start; member
Dsmu7_smumgr.h45 uint32_t dpm_table_start; member
Dfiji_smumgr.c1010 uint32_t array = smu_data->smu7_data.dpm_table_start + in fiji_populate_all_graphic_levels()
1226 uint32_t array = smu_data->smu7_data.dpm_table_start + in fiji_populate_all_memory_levels()
2105 smu_data->smu7_data.dpm_table_start + in fiji_init_smc_table()
2279 smu_data->smu7_data.dpm_table_start + in fiji_update_sclk_threshold()
2376 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + offsetof(SMU73_Discrete_DpmTable, in fiji_update_uvd_smc_table()
2412 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + in fiji_update_vce_smc_table()
2460 smu_data->smu7_data.dpm_table_start = tmp; in fiji_process_firmware_header()
2557 uint32_t array = smu_data->smu7_data.dpm_table_start + in fiji_update_dpm_settings()
2560 uint32_t mclk_array = smu_data->smu7_data.dpm_table_start + in fiji_update_dpm_settings()
Dvegam_smumgr.c239 smu_data->smu7_data.dpm_table_start = tmp; in vegam_process_firmware_header()
342 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + offsetof(SMU75_Discrete_DpmTable, in vegam_update_uvd_smc_table()
378 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + in vegam_update_vce_smc_table()
875 uint32_t array = smu_data->smu7_data.dpm_table_start + in vegam_populate_all_graphic_levels()
1042 uint32_t array = smu_data->smu7_data.dpm_table_start + in vegam_populate_all_memory_levels()
2135 smu_data->smu7_data.dpm_table_start + in vegam_init_smc_table()
2231 smu_data->smu7_data.dpm_table_start + in vegam_update_sclk_threshold()
Dtonga_smumgr.c694 uint32_t level_array_address = smu_data->smu7_data.dpm_table_start + in tonga_populate_all_graphic_levels()
1096 smu_data->smu7_data.dpm_table_start + in tonga_populate_all_memory_levels()
2437 smu_data->smu7_data.dpm_table_start + offsetof(SMU72_Discrete_DpmTable, SystemFlags), in tonga_init_smc_table()
2582 smu_data->smu7_data.dpm_table_start + in tonga_update_sclk_threshold()
2687 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + in tonga_update_uvd_smc_table()
2722 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + in tonga_update_vce_smc_table()
2772 smu_data->smu7_data.dpm_table_start = tmp; in tonga_process_firmware_header()
3156 uint32_t array = smu_data->smu7_data.dpm_table_start + in tonga_update_dpm_settings()
3159 uint32_t mclk_array = smu_data->smu7_data.dpm_table_start + in tonga_update_dpm_settings()
Dci_smumgr.c477 uint32_t array = smu_data->dpm_table_start + in ci_populate_all_graphic_levels()
1308 …uint32_t level_array_address = smu_data->dpm_table_start + offsetof(SMU7_Discrete_DpmTable, Memory… in ci_populate_all_memory_levels()
2102 result = ci_copy_bytes_to_smc(hwmgr, smu_data->dpm_table_start + in ci_init_smc_table()
2228 smu_data->dpm_table_start + in ci_update_sclk_threshold()
2384 ci_data->dpm_table_start = tmp; in ci_process_firmware_header()
2767 uint32_t array = smu_data->dpm_table_start + in ci_update_dpm_settings()
2770 uint32_t mclk_array = smu_data->dpm_table_start + in ci_update_dpm_settings()
Diceland_smumgr.c964 uint32_t level_array_adress = smu_data->smu7_data.dpm_table_start + in iceland_populate_all_graphic_levels()
1354 …uint32_t level_array_adress = smu_data->smu7_data.dpm_table_start + offsetof(SMU71_Discrete_DpmTab… in iceland_populate_all_memory_levels()
2057 result = smu7_copy_bytes_to_smc(hwmgr, smu_data->smu7_data.dpm_table_start + in iceland_init_smc_table()
2192 smu_data->smu7_data.dpm_table_start + in iceland_update_sclk_threshold()
2292 smu7_data->dpm_table_start = tmp; in iceland_process_firmware_header()
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu10_hwmgr.h244 uint32_t dpm_table_start; member
Dsmu8_hwmgr.h258 uint32_t dpm_table_start; member
Dsmu7_hwmgr.c5310 smu_data->smu7_data.dpm_table_start + offsetof(SMU74_Discrete_DpmTable, DisplayWatermark), in smu7_set_watermarks_for_clocks_ranges()