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Searched refs:dst_y_per_pte_row_nom_l (Results 1 – 13 of 13) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_hubp.c395 DST_Y_PER_PTE_ROW_NOM_L, &dlg_attr.dst_y_per_pte_row_nom_l); in hubp21_validate_dml_output()
429 if (dlg_attr.dst_y_per_pte_row_nom_l != dml_dlg_attr->dst_y_per_pte_row_nom_l) in hubp21_validate_dml_output()
431 dml_dlg_attr->dst_y_per_pte_row_nom_l, dlg_attr.dst_y_per_pte_row_nom_l); in hubp21_validate_dml_output()
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_hubp.c110 DST_Y_PER_PTE_ROW_NOM_L, dlg_attr->dst_y_per_pte_row_nom_l); in hubp2_program_deadline()
1129 DST_Y_PER_PTE_ROW_NOM_L, &dlg_attr->dst_y_per_pte_row_nom_l); in hubp2_read_state_common()
1435 DST_Y_PER_PTE_ROW_NOM_L, &dlg_attr.dst_y_per_pte_row_nom_l); in hubp2_validate_dml_output()
1469 if (dlg_attr.dst_y_per_pte_row_nom_l != dml_dlg_attr->dst_y_per_pte_row_nom_l) in hubp2_validate_dml_output()
1471 dml_dlg_attr->dst_y_per_pte_row_nom_l, dlg_attr.dst_y_per_pte_row_nom_l); in hubp2_validate_dml_output()
/drivers/gpu/drm/amd/display/dc/dml/
Ddisplay_rq_dlg_helpers.c266 dlg_regs.dst_y_per_pte_row_nom_l); in print__dlg_regs_st()
Ddisplay_mode_structs.h467 unsigned int dst_y_per_pte_row_nom_l; member
Ddml1_display_rq_dlg_calc.c1563 disp_dlg_regs->dst_y_per_pte_row_nom_l = (unsigned int) ((double) dpte_row_height_l in dml1_rq_dlg_get_dlg_params()
1565 ASSERT(disp_dlg_regs->dst_y_per_pte_row_nom_l < (unsigned int) dml_pow(2, 17)); in dml1_rq_dlg_get_dlg_params()
/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_hubp.c617 DST_Y_PER_PTE_ROW_NOM_L, dlg_attr->dst_y_per_pte_row_nom_l); in hubp1_program_deadline()
942 DST_Y_PER_PTE_ROW_NOM_L, &dlg_attr->dst_y_per_pte_row_nom_l); in hubp1_read_state_common()
Ddcn10_hw_sequencer_debug.c268 dlg_regs->refcyc_per_meta_chunk_flip_c, dlg_regs->dst_y_per_pte_row_nom_l, in dcn10_get_dlg_states()
Ddcn10_hw_sequencer.c244 dlg_regs->refcyc_per_meta_chunk_flip_c, dlg_regs->dst_y_per_pte_row_nom_l, in dcn10_log_hubp_states()
/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddisplay_rq_dlg_calc_20v2.c1443 disp_dlg_regs->dst_y_per_pte_row_nom_l = (unsigned int) ((double) dpte_row_height_l in dml20v2_rq_dlg_get_dlg_params()
1445 ASSERT(disp_dlg_regs->dst_y_per_pte_row_nom_l < (unsigned int) dml_pow(2, 17)); in dml20v2_rq_dlg_get_dlg_params()
Ddisplay_rq_dlg_calc_20.c1442 disp_dlg_regs->dst_y_per_pte_row_nom_l = (unsigned int) ((double) dpte_row_height_l in dml20_rq_dlg_get_dlg_params()
1444 ASSERT(disp_dlg_regs->dst_y_per_pte_row_nom_l < (unsigned int) dml_pow(2, 17)); in dml20_rq_dlg_get_dlg_params()
/drivers/gpu/drm/amd/display/dc/dml/dcn21/
Ddisplay_rq_dlg_calc_21.c1545 disp_dlg_regs->dst_y_per_pte_row_nom_l = (unsigned int) ((double) dpte_row_height_l in dml_rq_dlg_get_dlg_params()
1547 ASSERT(disp_dlg_regs->dst_y_per_pte_row_nom_l < (unsigned int)dml_pow(2, 17)); in dml_rq_dlg_get_dlg_params()
/drivers/gpu/drm/amd/display/dc/dml/dcn31/
Ddisplay_rq_dlg_calc_31.c1590 …disp_dlg_regs->dst_y_per_pte_row_nom_l = (unsigned int) ((double) dpte_row_height_l / (double) vra… in dml_rq_dlg_get_dlg_params()
1591 ASSERT(disp_dlg_regs->dst_y_per_pte_row_nom_l < (unsigned int)dml_pow(2, 17)); in dml_rq_dlg_get_dlg_params()
/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddisplay_rq_dlg_calc_30.c1722 disp_dlg_regs->dst_y_per_pte_row_nom_l = (unsigned int)((double)dpte_row_height_l in dml_rq_dlg_get_dlg_params()
1724 ASSERT(disp_dlg_regs->dst_y_per_pte_row_nom_l < (unsigned int)dml_pow(2, 17)); in dml_rq_dlg_get_dlg_params()