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Searched refs:dwidth (Results 1 – 12 of 12) sorted by relevance

/drivers/bus/
Dhisi_lpc.c207 static u32 hisi_lpc_comm_in(void *hostdata, unsigned long pio, size_t dwidth) in hisi_lpc_comm_in() argument
215 if (!lpcdev || !dwidth || dwidth > LPC_MAX_DWIDTH) in hisi_lpc_comm_in()
221 iopara.csize = dwidth; in hisi_lpc_comm_in()
224 (unsigned char *)&rd_data, dwidth); in hisi_lpc_comm_in()
241 u32 val, size_t dwidth) in hisi_lpc_comm_out() argument
249 if (!lpcdev || !dwidth || dwidth > LPC_MAX_DWIDTH) in hisi_lpc_comm_out()
256 iopara.csize = dwidth; in hisi_lpc_comm_out()
258 hisi_lpc_target_out(lpcdev, &iopara, addr, buf, dwidth); in hisi_lpc_comm_out()
273 size_t dwidth, unsigned int count) in hisi_lpc_comm_ins() argument
280 if (!lpcdev || !buf || !count || !dwidth || dwidth > LPC_MAX_DWIDTH) in hisi_lpc_comm_ins()
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/drivers/vme/bridges/
Dvme_fake.c58 u32 dwidth; member
253 u32 aspace, u32 cycle, u32 dwidth) in fake_master_set() argument
284 switch (dwidth) { in fake_master_set()
322 bridge->masters[i].dwidth = dwidth; in fake_master_set()
340 u32 *aspace, u32 *cycle, u32 *dwidth) in __fake_master_get() argument
354 *dwidth = bridge->masters[i].dwidth; in __fake_master_get()
362 u32 *aspace, u32 *cycle, u32 *dwidth) in fake_master_get() argument
369 cycle, dwidth); in fake_master_get()
520 u32 aspace, cycle, dwidth; in fake_master_read() local
537 dwidth = priv->masters[i].dwidth; in fake_master_read()
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Dvme_tsi148.c808 u32 cycle, u32 dwidth) in tsi148_master_set() argument
948 switch (dwidth) { in tsi148_master_set()
1049 u32 *cycle, u32 *dwidth) in __tsi148_master_get() argument
1090 *dwidth = 0; in __tsi148_master_get()
1149 *dwidth = VME_D16; in __tsi148_master_get()
1151 *dwidth = VME_D32; in __tsi148_master_get()
1159 u32 *cycle, u32 *dwidth) in tsi148_master_get() argument
1166 cycle, dwidth); in tsi148_master_get()
1178 u32 aspace, cycle, dwidth; in tsi148_master_read() local
1191 &cycle, &dwidth); in tsi148_master_read()
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Dvme_ca91cx42.c591 u32 cycle, u32 dwidth) in ca91cx42_master_set() argument
663 switch (dwidth) { in ca91cx42_master_set()
748 u32 *aspace, u32 *cycle, u32 *dwidth) in __ca91cx42_master_get() argument
770 *dwidth = 0; in __ca91cx42_master_get()
817 *dwidth = VME_D8; in __ca91cx42_master_get()
820 *dwidth = VME_D16; in __ca91cx42_master_get()
823 *dwidth = VME_D32; in __ca91cx42_master_get()
826 *dwidth = VME_D64; in __ca91cx42_master_get()
835 u32 *cycle, u32 *dwidth) in ca91cx42_master_get() argument
842 cycle, dwidth); in ca91cx42_master_get()
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/drivers/dma/
Dat_xdmac.c593 int csize, dwidth; in at_xdmac_compute_chan_conf() local
614 dwidth = ffs(atchan->sconfig.src_addr_width) - 1; in at_xdmac_compute_chan_conf()
615 if (dwidth < 0) { in at_xdmac_compute_chan_conf()
619 atchan->cfg |= AT_XDMAC_CC_DWIDTH(dwidth); in at_xdmac_compute_chan_conf()
639 dwidth = ffs(atchan->sconfig.dst_addr_width) - 1; in at_xdmac_compute_chan_conf()
640 if (dwidth < 0) { in at_xdmac_compute_chan_conf()
644 atchan->cfg |= AT_XDMAC_CC_DWIDTH(dwidth); in at_xdmac_compute_chan_conf()
720 u32 len, mem, dwidth, fixed_dwidth; in at_xdmac_prep_slave_sg() local
748 dwidth = at_xdmac_get_dwidth(atchan->cfg); in at_xdmac_prep_slave_sg()
749 fixed_dwidth = IS_ALIGNED(len, 1 << dwidth) in at_xdmac_prep_slave_sg()
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Dmpc512x_dma.c209 u8 dwidth; member
745 if (!IS_ALIGNED(sg_dma_address(sg), mchan->dwidth)) in mpc_dma_prep_slave_sg()
749 tcd->doff = mchan->dwidth; in mpc_dma_prep_slave_sg()
762 tcd->dsize = buswidth_to_dmatsize(mchan->dwidth); in mpc_dma_prep_slave_sg()
866 mchan->dwidth = cfg->dst_addr_width; in mpc_dma_device_config()
Dat_hdmac.c688 unsigned int dwidth; in atc_prep_dma_interleaved() local
725 dwidth = atc_get_xfer_width(xt->src_start, in atc_prep_dma_interleaved()
728 xfer_count = len >> dwidth; in atc_prep_dma_interleaved()
734 ctrla = ATC_SRC_WIDTH(dwidth) | in atc_prep_dma_interleaved()
735 ATC_DST_WIDTH(dwidth); in atc_prep_dma_interleaved()
757 desc->boundary = first->size >> dwidth; in atc_prep_dma_interleaved()
758 desc->dst_hole = (dmaengine_get_dst_icg(xt, first) >> dwidth) + 1; in atc_prep_dma_interleaved()
759 desc->src_hole = (dmaengine_get_src_icg(xt, first) >> dwidth) + 1; in atc_prep_dma_interleaved()
/drivers/vme/
Dvme.c167 u32 aspace, cycle, dwidth; in vme_get_size() local
172 &aspace, &cycle, &dwidth); in vme_get_size()
483 u32 cycle, u32 dwidth) in vme_master_request() argument
511 ((master_image->width_attr & dwidth) == dwidth) && in vme_master_request()
567 u32 cycle, u32 dwidth) in vme_master_set() argument
587 ((image->width_attr & dwidth) == dwidth))) { in vme_master_set()
597 cycle, dwidth); in vme_master_set()
618 u32 *cycle, u32 *dwidth) in vme_master_get() argument
636 cycle, dwidth); in vme_master_get()
1048 u32 aspace, u32 cycle, u32 dwidth) in vme_dma_vme_attribute() argument
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Dvme_bridge.h51 u32 dwidth; member
/drivers/video/fbdev/i810/
Di810_accel.c161 static inline void source_copy_blit(int dwidth, int dheight, int dpitch, in source_copy_blit() argument
171 PUT_RING(dheight << 16 | dwidth); in source_copy_blit()
235 static inline void mono_src_copy_imm_blit(int dwidth, int dheight, int dpitch, in mono_src_copy_imm_blit() argument
246 PUT_RING(dheight << 16 | dwidth); in mono_src_copy_imm_blit()
/drivers/staging/vme/devices/
Dvme_user.h16 __u32 dwidth; /* Maximum Data Width */ member
Dvme_user.c330 &master.cycle, &master.dwidth); in vme_user_ioctl()
359 master.aspace, master.cycle, master.dwidth); in vme_user_ioctl()