/drivers/gpu/drm/amd/display/dc/gpio/dce60/ |
D | hw_translate_dce60.c | 67 uint32_t *en) in offset_to_id() argument 75 *en = GPIO_GENERIC_A; in offset_to_id() 78 *en = GPIO_GENERIC_B; in offset_to_id() 81 *en = GPIO_GENERIC_C; in offset_to_id() 84 *en = GPIO_GENERIC_D; in offset_to_id() 87 *en = GPIO_GENERIC_E; in offset_to_id() 90 *en = GPIO_GENERIC_F; in offset_to_id() 93 *en = GPIO_GENERIC_G; in offset_to_id() 105 *en = GPIO_HPD_1; in offset_to_id() 108 *en = GPIO_HPD_2; in offset_to_id() [all …]
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D | hw_factory_dce60.c | 118 uint32_t en) in define_ddc_registers() argument 124 ddc->regs = &ddc_data_regs[en]; in define_ddc_registers() 125 ddc->base.regs = &ddc_data_regs[en].gpio; in define_ddc_registers() 128 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers() 129 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers() 141 static void define_hpd_registers(struct hw_gpio_pin *pin, uint32_t en) in define_hpd_registers() argument 145 hpd->regs = &hpd_regs[en]; in define_hpd_registers() 148 hpd->base.regs = &hpd_regs[en].gpio; in define_hpd_registers()
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/drivers/gpu/drm/amd/display/dc/gpio/dce80/ |
D | hw_translate_dce80.c | 67 uint32_t *en) in offset_to_id() argument 75 *en = GPIO_GENERIC_A; in offset_to_id() 78 *en = GPIO_GENERIC_B; in offset_to_id() 81 *en = GPIO_GENERIC_C; in offset_to_id() 84 *en = GPIO_GENERIC_D; in offset_to_id() 87 *en = GPIO_GENERIC_E; in offset_to_id() 90 *en = GPIO_GENERIC_F; in offset_to_id() 93 *en = GPIO_GENERIC_G; in offset_to_id() 105 *en = GPIO_HPD_1; in offset_to_id() 108 *en = GPIO_HPD_2; in offset_to_id() [all …]
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D | hw_factory_dce80.c | 118 uint32_t en) in define_ddc_registers() argument 124 ddc->regs = &ddc_data_regs[en]; in define_ddc_registers() 125 ddc->base.regs = &ddc_data_regs[en].gpio; in define_ddc_registers() 128 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers() 129 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers() 141 static void define_hpd_registers(struct hw_gpio_pin *pin, uint32_t en) in define_hpd_registers() argument 145 hpd->regs = &hpd_regs[en]; in define_hpd_registers() 148 hpd->base.regs = &hpd_regs[en].gpio; in define_hpd_registers()
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/drivers/gpu/drm/amd/display/dc/gpio/dce110/ |
D | hw_translate_dce110.c | 43 uint32_t *en) in offset_to_id() argument 51 *en = GPIO_GENERIC_A; in offset_to_id() 54 *en = GPIO_GENERIC_B; in offset_to_id() 57 *en = GPIO_GENERIC_C; in offset_to_id() 60 *en = GPIO_GENERIC_D; in offset_to_id() 63 *en = GPIO_GENERIC_E; in offset_to_id() 66 *en = GPIO_GENERIC_F; in offset_to_id() 69 *en = GPIO_GENERIC_G; in offset_to_id() 81 *en = GPIO_HPD_1; in offset_to_id() 84 *en = GPIO_HPD_2; in offset_to_id() [all …]
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D | hw_factory_dce110.c | 114 uint32_t en) in define_ddc_registers() argument 120 ddc->regs = &ddc_data_regs[en]; in define_ddc_registers() 121 ddc->base.regs = &ddc_data_regs[en].gpio; in define_ddc_registers() 124 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers() 125 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers() 137 static void define_hpd_registers(struct hw_gpio_pin *pin, uint32_t en) in define_hpd_registers() argument 141 hpd->regs = &hpd_regs[en]; in define_hpd_registers() 144 hpd->base.regs = &hpd_regs[en].gpio; in define_hpd_registers()
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/drivers/gpu/drm/amd/display/dc/gpio/dcn21/ |
D | hw_translate_dcn21.c | 68 uint32_t *en) in offset_to_id() argument 76 *en = GPIO_GENERIC_A; in offset_to_id() 79 *en = GPIO_GENERIC_B; in offset_to_id() 82 *en = GPIO_GENERIC_C; in offset_to_id() 85 *en = GPIO_GENERIC_D; in offset_to_id() 88 *en = GPIO_GENERIC_E; in offset_to_id() 91 *en = GPIO_GENERIC_F; in offset_to_id() 94 *en = GPIO_GENERIC_G; in offset_to_id() 99 *en = GPIO_DDC_LINE_DDC1; in offset_to_id() 110 *en = GPIO_HPD_1; in offset_to_id() [all …]
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D | hw_factory_dcn21.c | 159 static void define_generic_registers(struct hw_gpio_pin *pin, uint32_t en) in define_generic_registers() argument 163 generic->regs = &generic_regs[en]; in define_generic_registers() 164 generic->shifts = &generic_shift[en]; in define_generic_registers() 165 generic->masks = &generic_mask[en]; in define_generic_registers() 166 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers() 171 uint32_t en) in define_ddc_registers() argument 177 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers() 178 ddc->base.regs = &ddc_data_regs_dcn[en].gpio; in define_ddc_registers() 181 ddc->regs = &ddc_clk_regs_dcn[en]; in define_ddc_registers() 182 ddc->base.regs = &ddc_clk_regs_dcn[en].gpio; in define_ddc_registers() [all …]
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/drivers/gpu/drm/amd/display/dc/gpio/dcn10/ |
D | hw_translate_dcn10.c | 65 uint32_t *en) in offset_to_id() argument 73 *en = GPIO_GENERIC_A; in offset_to_id() 76 *en = GPIO_GENERIC_B; in offset_to_id() 79 *en = GPIO_GENERIC_C; in offset_to_id() 82 *en = GPIO_GENERIC_D; in offset_to_id() 85 *en = GPIO_GENERIC_E; in offset_to_id() 88 *en = GPIO_GENERIC_F; in offset_to_id() 91 *en = GPIO_GENERIC_G; in offset_to_id() 103 *en = GPIO_HPD_1; in offset_to_id() 106 *en = GPIO_HPD_2; in offset_to_id() [all …]
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D | hw_factory_dcn10.c | 151 static void define_generic_registers(struct hw_gpio_pin *pin, uint32_t en) in define_generic_registers() argument 155 generic->regs = &generic_regs[en]; in define_generic_registers() 156 generic->shifts = &generic_shift[en]; in define_generic_registers() 157 generic->masks = &generic_mask[en]; in define_generic_registers() 158 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers() 163 uint32_t en) in define_ddc_registers() argument 169 ddc->regs = &ddc_data_regs[en]; in define_ddc_registers() 170 ddc->base.regs = &ddc_data_regs[en].gpio; in define_ddc_registers() 173 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers() 174 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers() [all …]
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/drivers/gpu/drm/amd/display/dc/gpio/dce120/ |
D | hw_translate_dce120.c | 65 uint32_t *en) in offset_to_id() argument 73 *en = GPIO_GENERIC_A; in offset_to_id() 76 *en = GPIO_GENERIC_B; in offset_to_id() 79 *en = GPIO_GENERIC_C; in offset_to_id() 82 *en = GPIO_GENERIC_D; in offset_to_id() 85 *en = GPIO_GENERIC_E; in offset_to_id() 88 *en = GPIO_GENERIC_F; in offset_to_id() 91 *en = GPIO_GENERIC_G; in offset_to_id() 103 *en = GPIO_HPD_1; in offset_to_id() 106 *en = GPIO_HPD_2; in offset_to_id() [all …]
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D | hw_factory_dce120.c | 131 uint32_t en) in define_ddc_registers() argument 137 ddc->regs = &ddc_data_regs[en]; in define_ddc_registers() 138 ddc->base.regs = &ddc_data_regs[en].gpio; in define_ddc_registers() 141 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers() 142 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers() 154 static void define_hpd_registers(struct hw_gpio_pin *pin, uint32_t en) in define_hpd_registers() argument 158 hpd->regs = &hpd_regs[en]; in define_hpd_registers() 161 hpd->base.regs = &hpd_regs[en].gpio; in define_hpd_registers()
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/drivers/gpu/drm/amd/display/dc/gpio/dcn20/ |
D | hw_translate_dcn20.c | 69 uint32_t *en) in offset_to_id() argument 77 *en = GPIO_GENERIC_A; in offset_to_id() 80 *en = GPIO_GENERIC_B; in offset_to_id() 83 *en = GPIO_GENERIC_C; in offset_to_id() 86 *en = GPIO_GENERIC_D; in offset_to_id() 89 *en = GPIO_GENERIC_E; in offset_to_id() 92 *en = GPIO_GENERIC_F; in offset_to_id() 95 *en = GPIO_GENERIC_G; in offset_to_id() 107 *en = GPIO_HPD_1; in offset_to_id() 110 *en = GPIO_HPD_2; in offset_to_id() [all …]
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D | hw_factory_dcn20.c | 181 uint32_t en) in define_ddc_registers() argument 187 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers() 188 ddc->base.regs = &ddc_data_regs_dcn[en].gpio; in define_ddc_registers() 191 ddc->regs = &ddc_clk_regs_dcn[en]; in define_ddc_registers() 192 ddc->base.regs = &ddc_clk_regs_dcn[en].gpio; in define_ddc_registers() 199 ddc->shifts = &ddc_shift[en]; in define_ddc_registers() 200 ddc->masks = &ddc_mask[en]; in define_ddc_registers() 204 static void define_hpd_registers(struct hw_gpio_pin *pin, uint32_t en) in define_hpd_registers() argument 208 hpd->regs = &hpd_regs[en]; in define_hpd_registers() 211 hpd->base.regs = &hpd_regs[en].gpio; in define_hpd_registers() [all …]
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/drivers/gpu/drm/amd/display/dc/gpio/dcn30/ |
D | hw_translate_dcn30.c | 75 uint32_t *en) in offset_to_id() argument 83 *en = GPIO_GENERIC_A; in offset_to_id() 86 *en = GPIO_GENERIC_B; in offset_to_id() 89 *en = GPIO_GENERIC_C; in offset_to_id() 92 *en = GPIO_GENERIC_D; in offset_to_id() 95 *en = GPIO_GENERIC_E; in offset_to_id() 98 *en = GPIO_GENERIC_F; in offset_to_id() 101 *en = GPIO_GENERIC_G; in offset_to_id() 113 *en = GPIO_HPD_1; in offset_to_id() 116 *en = GPIO_HPD_2; in offset_to_id() [all …]
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D | hw_factory_dcn30.c | 187 static void define_generic_registers(struct hw_gpio_pin *pin, uint32_t en) in define_generic_registers() argument 191 generic->regs = &generic_regs[en]; in define_generic_registers() 192 generic->shifts = &generic_shift[en]; in define_generic_registers() 193 generic->masks = &generic_mask[en]; in define_generic_registers() 194 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers() 199 uint32_t en) in define_ddc_registers() argument 205 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers() 206 ddc->base.regs = &ddc_data_regs_dcn[en].gpio; in define_ddc_registers() 209 ddc->regs = &ddc_clk_regs_dcn[en]; in define_ddc_registers() 210 ddc->base.regs = &ddc_clk_regs_dcn[en].gpio; in define_ddc_registers() [all …]
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/drivers/net/ethernet/mellanox/mlx5/core/ |
D | Makefile | 25 mlx5_core-$(CONFIG_MLX5_CORE_EN) += en/rqt.o en/tir.o en/rss.o en/rx_res.o \ 26 en/channels.o en_main.o en_common.o en_fs.o en_ethtool.o \ 27 en_tx.o en_rx.o en_dim.o en_txrx.o en/xdp.o en_stats.o \ 28 en_selftest.o en/port.o en/monitor_stats.o en/health.o \ 29 en/reporter_tx.o en/reporter_rx.o en/params.o en/xsk/pool.o \ 30 en/xsk/setup.o en/xsk/rx.o en/xsk/tx.o en/devlink.o en/ptp.o \ 31 en/qos.o en/trap.o en/fs_tt_redirect.o 38 mlx5_core-$(CONFIG_MLX5_CORE_EN_DCB) += en_dcbnl.o en/port_buffer.o 39 mlx5_core-$(CONFIG_PCI_HYPERV_INTERFACE) += en/hv_vhca_stats.o 41 en_rep.o en/rep/bond.o en/mod_hdr.o \ [all …]
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/drivers/gpu/drm/amd/display/dc/gpio/ |
D | gpio_service.c | 134 uint32_t en; in dal_gpio_service_create_irq() local 136 if (!service->translate.funcs->offset_to_id(offset, mask, &id, &en)) { in dal_gpio_service_create_irq() 141 return dal_gpio_create_irq(service, id, en); in dal_gpio_service_create_irq() 150 uint32_t en; in dal_gpio_service_create_generic_mux() local 153 if (!service->translate.funcs->offset_to_id(offset, mask, &id, &en)) { in dal_gpio_service_create_generic_mux() 159 service, id, en, GPIO_PIN_OUTPUT_STATE_DEFAULT); in dal_gpio_service_create_generic_mux() 181 uint32_t en) in dal_gpio_get_generic_pin_info() argument 186 service->translate.funcs->id_to_offset(id, en, &pin); in dal_gpio_get_generic_pin_info() 242 uint32_t en) in is_pin_busy() argument 244 return service->busyness[id][en]; in is_pin_busy() [all …]
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D | hw_ddc.c | 98 if (hw_gpio->base.en != GPIO_DDC_LINE_VIP_PAD) { in set_config() 173 if ((hw_gpio->base.en >= GPIO_DDC_LINE_DDC1) && in set_config() 174 (hw_gpio->base.en <= GPIO_DDC_LINE_DDC_VGA)) { in set_config() 183 if ((hw_gpio->base.en >= GPIO_DDC_LINE_DDC1) && in set_config() 184 (hw_gpio->base.en <= GPIO_DDC_LINE_DDC_VGA)) { in set_config() 193 if ((hw_gpio->base.en >= GPIO_DDC_LINE_DDC1) && in set_config() 194 (hw_gpio->base.en <= GPIO_DDC_LINE_DDC_VGA)) { in set_config() 221 uint32_t en, in dal_hw_ddc_construct() argument 224 dal_hw_gpio_construct(&ddc->base, id, en, ctx); in dal_hw_ddc_construct() 232 uint32_t en) in dal_hw_ddc_init() argument [all …]
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D | gpio_base.c | 113 return dal_gpio_service_lock(gpio->service, gpio->id, gpio->en); in dal_gpio_lock_pin() 119 return dal_gpio_service_unlock(gpio->service, gpio->id, gpio->en); in dal_gpio_unlock_pin() 143 return gpio->en; in dal_gpio_get_enum() 163 gpio->id, gpio->en, pin_info) ? in dal_gpio_get_pin_info() 172 switch (gpio->en) { in dal_gpio_get_sync_source() 190 switch (gpio->en) { in dal_gpio_get_sync_source() 204 switch (gpio->en) { in dal_gpio_get_sync_source() 214 switch (gpio->en) { in dal_gpio_get_sync_source() 272 uint32_t en, in dal_gpio_create() argument 285 gpio->en = en; in dal_gpio_create() [all …]
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D | hw_factory.h | 43 uint32_t en); 48 uint32_t en); 53 uint32_t en); 62 uint32_t en); 65 uint32_t en); 68 uint32_t en);
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/drivers/gpu/drm/amd/display/dc/inc/hw/ |
D | gpio.h | 42 uint32_t en; member 57 uint32_t en); 61 uint32_t en); 65 uint32_t en); 69 uint32_t en); 73 uint32_t en); 77 uint32_t en); 81 uint32_t en); 88 uint32_t *en); 91 uint32_t en,
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/drivers/media/platform/qcom/venus/ |
D | hfi_cmds.c | 446 struct hfi_enable *in = pdata, *en = prop_data; in pkt_session_set_property_1x() local 448 en->enable = in->enable; in pkt_session_set_property_1x() 502 struct hfi_enable_picture *in = pdata, *en = prop_data; in pkt_session_set_property_1x() local 504 en->picture_type = in->picture_type; in pkt_session_set_property_1x() 505 pkt->shdr.hdr.size += sizeof(u32) + sizeof(*en); in pkt_session_set_property_1x() 509 struct hfi_enable *in = pdata, *en = prop_data; in pkt_session_set_property_1x() local 511 en->enable = in->enable; in pkt_session_set_property_1x() 512 pkt->shdr.hdr.size += sizeof(u32) + sizeof(*en); in pkt_session_set_property_1x() 517 struct hfi_enable *en = prop_data; in pkt_session_set_property_1x() local 519 en->enable = in->enable; in pkt_session_set_property_1x() [all …]
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/drivers/media/pci/ddbridge/ |
D | ddbridge-ci.c | 170 memcpy(&ci->en, &en_templ, sizeof(en_templ)); in ci_attach() 171 ci->en.data = ci; in ci_attach() 172 port->en = &ci->en; in ci_attach() 303 memcpy(&ci->en, &en_xo2_templ, sizeof(en_xo2_templ)); in ci_xo2_attach() 304 ci->en.data = ci; in ci_xo2_attach() 305 port->en = &ci->en; in ci_xo2_attach() 327 cxd_cfg.en = &port->en; in ci_cxd2099_attach() 364 if (!port->en) in ddb_ci_attach() 366 dvb_ca_en50221_init(port->dvb[0].adap, port->en, 0, 1); in ddb_ci_attach() 374 if (port->en) { in ddb_ci_detach() [all …]
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/drivers/nvmem/ |
D | sprd-efuse.c | 106 static void sprd_efuse_set_prog_power(struct sprd_efuse *efuse, bool en) in sprd_efuse_set_prog_power() argument 110 if (en) in sprd_efuse_set_prog_power() 120 if (en) in sprd_efuse_set_prog_power() 131 static void sprd_efuse_set_read_power(struct sprd_efuse *efuse, bool en) in sprd_efuse_set_read_power() argument 135 if (en) in sprd_efuse_set_read_power() 146 static void sprd_efuse_set_prog_lock(struct sprd_efuse *efuse, bool en) in sprd_efuse_set_prog_lock() argument 150 if (en) in sprd_efuse_set_prog_lock() 158 static void sprd_efuse_set_auto_check(struct sprd_efuse *efuse, bool en) in sprd_efuse_set_auto_check() argument 162 if (en) in sprd_efuse_set_auto_check() 170 static void sprd_efuse_set_data_double(struct sprd_efuse *efuse, bool en) in sprd_efuse_set_data_double() argument [all …]
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