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Searched refs:exec (Results 1 – 25 of 47) sorted by relevance

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/drivers/gpu/drm/vc4/
Dvc4_gem.c154 struct vc4_exec_info *exec[2]; in vc4_save_hang_state() local
166 exec[0] = vc4_first_bin_job(vc4); in vc4_save_hang_state()
167 exec[1] = vc4_first_render_job(vc4); in vc4_save_hang_state()
168 if (!exec[0] && !exec[1]) { in vc4_save_hang_state()
176 if (!exec[i]) in vc4_save_hang_state()
180 list_for_each_entry(bo, &exec[i]->unref_list, unref_head) in vc4_save_hang_state()
182 state->bo_count += exec[i]->bo_count + unref_list_count; in vc4_save_hang_state()
195 if (!exec[i]) in vc4_save_hang_state()
198 for (j = 0; j < exec[i]->bo_count; j++) { in vc4_save_hang_state()
199 bo = to_vc4_bo(&exec[i]->bo[j]->base); in vc4_save_hang_state()
[all …]
Dvc4_validate.c51 struct vc4_exec_info *exec, \
106 vc4_use_bo(struct vc4_exec_info *exec, uint32_t hindex) in vc4_use_bo() argument
111 if (hindex >= exec->bo_count) { in vc4_use_bo()
113 hindex, exec->bo_count); in vc4_use_bo()
116 obj = exec->bo[hindex]; in vc4_use_bo()
129 vc4_use_handle(struct vc4_exec_info *exec, uint32_t gem_handles_packet_index) in vc4_use_handle() argument
131 return vc4_use_bo(exec, exec->bo_index[gem_handles_packet_index]); in vc4_use_handle()
135 validate_bin_pos(struct vc4_exec_info *exec, void *untrusted, uint32_t pos) in validate_bin_pos() argument
140 return (untrusted - 1 == exec->bin_u + pos); in validate_bin_pos()
159 vc4_check_tex_size(struct vc4_exec_info *exec, struct drm_gem_cma_object *fbo, in vc4_check_tex_size() argument
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Dvc4_render_cl.c99 static uint32_t vc4_full_res_offset(struct vc4_exec_info *exec, in vc4_full_res_offset() argument
105 (DIV_ROUND_UP(exec->args->width, 32) * y + x); in vc4_full_res_offset()
123 static void emit_tile(struct vc4_exec_info *exec, in emit_tile() argument
127 struct drm_vc4_submit_cl *args = exec->args; in emit_tile()
139 vc4_full_res_offset(exec, setup->color_read, in emit_tile()
161 vc4_full_res_offset(exec, setup->zs_read, in emit_tile()
185 rcl_u32(setup, (exec->tile_alloc_offset + in emit_tile()
186 (y * exec->bin_tiles_x + x) * 32)); in emit_tile()
201 vc4_full_res_offset(exec, setup->msaa_color_write, in emit_tile()
219 vc4_full_res_offset(exec, setup->msaa_zs_write, in emit_tile()
[all …]
Dvc4_irq.c68 struct vc4_exec_info *exec; in vc4_overflow_mem_work() local
93 exec = vc4_first_bin_job(vc4); in vc4_overflow_mem_work()
94 if (!exec) in vc4_overflow_mem_work()
95 exec = vc4_last_render_job(vc4); in vc4_overflow_mem_work()
96 if (exec) { in vc4_overflow_mem_work()
97 exec->bin_slots |= vc4->bin_alloc_overflow; in vc4_overflow_mem_work()
121 struct vc4_exec_info *next, *exec = vc4_first_bin_job(vc4); in vc4_irq_finish_bin_job() local
123 if (!exec) in vc4_irq_finish_bin_job()
126 vc4_move_job_to_render(dev, exec); in vc4_irq_finish_bin_job()
133 if (next && next->perfmon == exec->perfmon) in vc4_irq_finish_bin_job()
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Dvc4_drv.h906 void vc4_move_job_to_render(struct drm_device *dev, struct vc4_exec_info *exec);
972 struct vc4_exec_info *exec);
975 vc4_validate_shader_recs(struct drm_device *dev, struct vc4_exec_info *exec);
977 struct drm_gem_cma_object *vc4_use_bo(struct vc4_exec_info *exec,
980 int vc4_get_rcl(struct drm_device *dev, struct vc4_exec_info *exec);
982 bool vc4_check_tex_size(struct vc4_exec_info *exec,
Dvc4_v3d.c173 struct vc4_exec_info *exec; in vc4_v3d_get_bin_slot() local
189 exec = vc4_last_render_job(vc4); in vc4_v3d_get_bin_slot()
190 if (exec) in vc4_v3d_get_bin_slot()
191 seqno = exec->seqno; in vc4_v3d_get_bin_slot()
/drivers/leds/
Dleds-lp8501.c160 u8 exec; in lp8501_run_engine() local
178 ret = lp55xx_read(chip, LP8501_REG_ENABLE, &exec); in lp8501_run_engine()
185 exec = (exec & ~LP8501_EXEC_ENG1_M) | LP8501_RUN_ENG1; in lp8501_run_engine()
190 exec = (exec & ~LP8501_EXEC_ENG2_M) | LP8501_RUN_ENG2; in lp8501_run_engine()
195 exec = (exec & ~LP8501_EXEC_ENG3_M) | LP8501_RUN_ENG3; in lp8501_run_engine()
201 lp55xx_update_bits(chip, LP8501_REG_ENABLE, LP8501_EXEC_M, exec); in lp8501_run_engine()
Dleds-lp5562.c157 u8 exec; in lp5562_run_engine() local
179 ret = lp55xx_read(chip, LP5562_REG_ENABLE, &exec); in lp5562_run_engine()
186 exec = (exec & ~LP5562_EXEC_ENG1_M) | LP5562_RUN_ENG1; in lp5562_run_engine()
191 exec = (exec & ~LP5562_EXEC_ENG2_M) | LP5562_RUN_ENG2; in lp5562_run_engine()
196 exec = (exec & ~LP5562_EXEC_ENG3_M) | LP5562_RUN_ENG3; in lp5562_run_engine()
202 lp55xx_update_bits(chip, LP5562_REG_ENABLE, LP5562_EXEC_M, exec); in lp5562_run_engine()
Dleds-lp5521.c165 u8 exec; in lp5521_run_engine() local
184 ret = lp55xx_read(chip, LP5521_REG_ENABLE, &exec); in lp5521_run_engine()
191 exec = (exec & ~LP5521_EXEC_R_M) | LP5521_RUN_R; in lp5521_run_engine()
196 exec = (exec & ~LP5521_EXEC_G_M) | LP5521_RUN_G; in lp5521_run_engine()
201 exec = (exec & ~LP5521_EXEC_B_M) | LP5521_RUN_B; in lp5521_run_engine()
207 lp55xx_update_bits(chip, LP5521_REG_ENABLE, LP5521_EXEC_M, exec); in lp5521_run_engine()
Dleds-lp5523.c221 u8 exec; in lp5523_run_engine() local
239 ret = lp55xx_read(chip, LP5523_REG_ENABLE, &exec); in lp5523_run_engine()
246 exec = (exec & ~LP5523_EXEC_ENG1_M) | LP5523_RUN_ENG1; in lp5523_run_engine()
251 exec = (exec & ~LP5523_EXEC_ENG2_M) | LP5523_RUN_ENG2; in lp5523_run_engine()
256 exec = (exec & ~LP5523_EXEC_ENG3_M) | LP5523_RUN_ENG3; in lp5523_run_engine()
262 lp55xx_update_bits(chip, LP5523_REG_ENABLE, LP5523_EXEC_M, exec); in lp5523_run_engine()
/drivers/sbus/char/
Doradax.c862 ctx->result.exec.status = DAX_SUBMIT_ERR_THR_INIT; in dax_ccb_exec()
869 ctx->result.exec.status = DAX_SUBMIT_ERR_NO_CA_AVAIL; in dax_ccb_exec()
879 ctx->result.exec.status = DAX_SUBMIT_ERR_CCB_ARR_MMU_MISS; in dax_ccb_exec()
887 ctx->result.exec.status = DAX_SUBMIT_ERR_NO_CA_AVAIL; in dax_ccb_exec()
893 ctx->result.exec.status = dax_preprocess_usr_ccbs(ctx, idx, nccbs); in dax_ccb_exec()
894 if (ctx->result.exec.status != DAX_SUBMIT_OK) in dax_ccb_exec()
897 ctx->result.exec.status = dax_lock_pages(ctx, idx, nccbs, in dax_ccb_exec()
898 &ctx->result.exec.status_data); in dax_ccb_exec()
899 if (ctx->result.exec.status != DAX_SUBMIT_OK) in dax_ccb_exec()
907 &accepted_len, &ctx->result.exec.status_data); in dax_ccb_exec()
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/drivers/gpu/drm/nouveau/nvkm/subdev/timer/
Dbase.c73 LIST_HEAD(exec); in nvkm_timer_alarm_trigger()
90 list_add(&alarm->exec, &exec); in nvkm_timer_alarm_trigger()
99 list_for_each_entry_safe(alarm, atemp, &exec, exec) { in nvkm_timer_alarm_trigger()
100 list_del(&alarm->exec); in nvkm_timer_alarm_trigger()
/drivers/gpu/drm/i915/gem/
Di915_gem_execbuffer.c36 struct drm_i915_gem_exec_object2 *exec; member
244 struct drm_i915_gem_exec_object2 *exec; /** ioctl execobj[] */ member
541 struct drm_i915_gem_exec_object2 *entry = &eb->exec[i]; in eb_add_vma()
545 ev->exec = entry; in eb_add_vma()
599 struct drm_i915_gem_exec_object2 *entry = ev->exec; in eb_reserve_vma()
845 vma = eb_lookup_vma(eb, eb->exec[i].handle); in eb_lookup_vmas()
851 err = eb_validate_vma(eb, &eb->exec[i], vma); in eb_lookup_vmas()
936 struct drm_i915_gem_exec_object2 *entry = &eb->exec[i]; in eb_validate_vmas()
967 eb_vma_misplaced(&eb->exec[i], vma, ev->flags)); in eb_validate_vmas()
1428 const struct drm_i915_gem_exec_object2 *entry = ev->exec; in eb_relocate_vma()
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/drivers/gpu/drm/nouveau/nvkm/subdev/mxm/
Dmxms.c97 bool (*exec)(struct nvkm_mxm *, u8 *, void *), void *info) in mxms_foreach()
148 if (mxm->subdev.debug >= NV_DBG_DEBUG && (exec == NULL)) { in mxms_foreach()
170 if (!exec(mxm, desc, info)) in mxms_foreach()
Dbase.c200 bool (*exec)(struct nvkm_mxm *, u8 version); member
218 if (shadow->exec(mxm, version)) { in mxm_shadow()
/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/
Dgm200.c125 u32 exec, args; in gm200_devinit_post() local
135 ret = pmu_load(init, 0x04, post, &exec, &args); in gm200_devinit_post()
160 pmu_exec(init, exec); in gm200_devinit_post()
/drivers/gpu/drm/nouveau/nvkm/subdev/bus/
Dhwsq.h75 hwsq_exec(struct hwsq *ram, bool exec) in hwsq_exec() argument
79 ret = nvkm_hwsq_fini(&ram->hwsq, exec); in hwsq_exec()
Dhwsq.c61 nvkm_hwsq_fini(struct nvkm_hwsq **phwsq, bool exec) in nvkm_hwsq_fini() argument
70 if (exec) in nvkm_hwsq_fini()
/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
Ddcb.c212 int (*exec)(struct nvkm_bios *, void *, int, u16)) in dcb_outp_foreach()
229 ret = exec(bios, data, idx, outp); in dcb_outp_foreach()
/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
Dramfuc.h71 ramfuc_exec(struct ramfuc *ram, bool exec) in ramfuc_exec() argument
75 ret = nvkm_memx_fini(&ram->memx, exec); in ramfuc_exec()
/drivers/gpu/drm/amd/amdkfd/
Dcwsr_trap_handler_gfx9.asm297 s_and_b64 exec, exec, exec // Restore STATUS.EXECZ, not writable by s_setreg_b32
329 s_mov_b64 exec, 0x0 //clear EXEC to get ready to receive
907 s_and_b64 exec, exec, exec // Restore STATUS.EXECZ, not writable by s_setreg_b32
Dcwsr_trap_handler_gfx10.asm263 s_and_b64 exec, exec, exec // Restore STATUS.EXECZ, not writable by s_setreg_b32
293 s_mov_b64 exec, 0x0 //clear EXEC to get ready to receive
980 s_and_b64 exec, exec, exec // Restore STATUS.EXECZ, not writable by s_setreg_b32
/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/
Dmemx.c72 nvkm_memx_fini(struct nvkm_memx **pmemx, bool exec) in nvkm_memx_fini() argument
88 if (exec) { in nvkm_memx_fini()
/drivers/gpu/drm/nouveau/include/nvkm/subdev/
Dbus.h14 int nvkm_hwsq_fini(struct nvkm_hwsq **, bool exec);
/drivers/connector/
DKconfig21 events such as fork, exec, id change (uid, gid, suid, etc), and exit.

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