Home
last modified time | relevance | path

Searched refs:fixed31_32 (Results 1 – 25 of 49) sorted by relevance

12

/drivers/gpu/drm/amd/display/include/
Dfixed31_32.h57 struct fixed31_32 { struct
67 static const struct fixed31_32 dc_fixpt_zero = { 0 }; argument
68 static const struct fixed31_32 dc_fixpt_epsilon = { 1LL };
69 static const struct fixed31_32 dc_fixpt_half = { 0x80000000LL };
70 static const struct fixed31_32 dc_fixpt_one = { 0x100000000LL };
81 struct fixed31_32 dc_fixpt_from_fraction(long long numerator, long long denominator);
87 static inline struct fixed31_32 dc_fixpt_from_int(int arg) in dc_fixpt_from_int()
89 struct fixed31_32 res; in dc_fixpt_from_int()
105 static inline struct fixed31_32 dc_fixpt_neg(struct fixed31_32 arg) in dc_fixpt_neg()
107 struct fixed31_32 res; in dc_fixpt_neg()
[all …]
/drivers/gpu/drm/amd/display/dc/basics/
Dfixpt31_32.c29 static const struct fixed31_32 dc_fixpt_two_pi = { 26986075409LL };
30 static const struct fixed31_32 dc_fixpt_ln2 = { 2977044471LL };
31 static const struct fixed31_32 dc_fixpt_ln2_div_2 = { 1488522236LL };
71 struct fixed31_32 dc_fixpt_from_fraction(long long numerator, long long denominator) in dc_fixpt_from_fraction()
73 struct fixed31_32 res; in dc_fixpt_from_fraction()
123 struct fixed31_32 dc_fixpt_mul(struct fixed31_32 arg1, struct fixed31_32 arg2) in dc_fixpt_mul()
125 struct fixed31_32 res; in dc_fixpt_mul()
174 struct fixed31_32 dc_fixpt_sqr(struct fixed31_32 arg) in dc_fixpt_sqr()
176 struct fixed31_32 res; in dc_fixpt_sqr()
214 struct fixed31_32 dc_fixpt_recip(struct fixed31_32 arg) in dc_fixpt_recip()
[all …]
Dconversion.c36 struct fixed31_32 arg, in fixed_point_to_int_frac()
81 struct fixed31_32 *flt, in convert_float_matrix()
84 const struct fixed31_32 min_2_13 = in convert_float_matrix()
86 const struct fixed31_32 max_2_13 = in convert_float_matrix()
Dconversion.h32 struct fixed31_32 arg,
38 struct fixed31_32 *flt,
/drivers/gpu/drm/amd/display/dc/inc/hw/
Dopp.h34 struct fixed31_32;
118 struct fixed31_32 r;
119 struct fixed31_32 g;
120 struct fixed31_32 b;
144 struct fixed31_32 x;
145 struct fixed31_32 regamma_y_red;
146 struct fixed31_32 regamma_y_green;
147 struct fixed31_32 regamma_y_blue;
152 struct fixed31_32 r;
153 struct fixed31_32 g;
[all …]
Dtransform.h130 struct fixed31_32 temperature_matrix[CSC_TEMPERATURE_MATRIX_SIZE];
142 struct fixed31_32 horz;
143 struct fixed31_32 vert;
144 struct fixed31_32 horz_c;
145 struct fixed31_32 vert_c;
162 struct fixed31_32 h;
163 struct fixed31_32 h_c;
164 struct fixed31_32 v;
165 struct fixed31_32 v_c;
266 const uint16_t *get_filter_3tap_16p(struct fixed31_32 ratio);
[all …]
Dhw_shared.h48 struct fixed31_32 x;
49 struct fixed31_32 y;
50 struct fixed31_32 offset;
51 struct fixed31_32 slope;
66 struct fixed31_32 red;
67 struct fixed31_32 green;
68 struct fixed31_32 blue;
70 struct fixed31_32 delta_red;
71 struct fixed31_32 delta_green;
72 struct fixed31_32 delta_blue;
Dstream_encoder.h146 struct fixed31_32 avg_time_slots_per_mtp);
/drivers/gpu/drm/amd/display/modules/color/
Dcolor_gamma.c67 struct fixed31_32 region_size = dc_fixpt_from_int(128); in setup_x_points_distribution()
71 struct fixed31_32 increment; in setup_x_points_distribution()
104 static void compute_pq(struct fixed31_32 in_x, struct fixed31_32 *out_y) in compute_pq()
107 const struct fixed31_32 m1 = in compute_pq()
109 const struct fixed31_32 m2 = in compute_pq()
111 const struct fixed31_32 c1 = in compute_pq()
113 const struct fixed31_32 c2 = in compute_pq()
115 const struct fixed31_32 c3 = in compute_pq()
118 struct fixed31_32 l_pow_m1; in compute_pq()
119 struct fixed31_32 base; in compute_pq()
[all …]
Dcolor_gamma.h90 struct fixed31_32 buffer[NUM_PTS_IN_REGION];
91 struct fixed31_32 gamma_of_2;
95 struct fixed31_32 arg;
96 struct fixed31_32 a0;
97 struct fixed31_32 a1;
98 struct fixed31_32 a2;
99 struct fixed31_32 a3;
100 struct fixed31_32 gamma;
Dcolor_table.c28 static struct fixed31_32 pq_table[MAX_HW_POINTS + 2];
29 static struct fixed31_32 de_pq_table[MAX_HW_POINTS + 2];
45 struct fixed31_32 *mod_color_get_table(enum table_type type) in mod_color_get_table()
47 struct fixed31_32 *table = NULL; in mod_color_get_table()
Dcolor_table.h43 struct fixed31_32 *mod_color_get_table(enum table_type type);
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dwb_scl.c530 const uint16_t *wbscl_get_filter_3tap_16p(struct fixed31_32 ratio) in wbscl_get_filter_3tap_16p()
542 const uint16_t *wbscl_get_filter_4tap_16p(struct fixed31_32 ratio) in wbscl_get_filter_4tap_16p()
554 static const uint16_t *wbscl_get_filter_5tap_16p(struct fixed31_32 ratio) in wbscl_get_filter_5tap_16p()
566 static const uint16_t *wbscl_get_filter_6tap_16p(struct fixed31_32 ratio) in wbscl_get_filter_6tap_16p()
578 static const uint16_t *wbscl_get_filter_7tap_16p(struct fixed31_32 ratio) in wbscl_get_filter_7tap_16p()
590 static const uint16_t *wbscl_get_filter_8tap_16p(struct fixed31_32 ratio) in wbscl_get_filter_8tap_16p()
602 static const uint16_t *wbscl_get_filter_9tap_16p(struct fixed31_32 ratio) in wbscl_get_filter_9tap_16p()
613 static const uint16_t *wbscl_get_filter_10tap_16p(struct fixed31_32 ratio) in wbscl_get_filter_10tap_16p()
625 static const uint16_t *wbscl_get_filter_11tap_16p(struct fixed31_32 ratio) in wbscl_get_filter_11tap_16p()
637 static const uint16_t *wbscl_get_filter_12tap_16p(struct fixed31_32 ratio) in wbscl_get_filter_12tap_16p()
[all …]
/drivers/gpu/drm/amd/display/dc/dce/
Ddce_scl_filters.c1341 const uint16_t *get_filter_3tap_16p(struct fixed31_32 ratio) in get_filter_3tap_16p()
1353 const uint16_t *get_filter_3tap_64p(struct fixed31_32 ratio) in get_filter_3tap_64p()
1365 const uint16_t *get_filter_4tap_16p(struct fixed31_32 ratio) in get_filter_4tap_16p()
1377 const uint16_t *get_filter_4tap_64p(struct fixed31_32 ratio) in get_filter_4tap_64p()
1389 const uint16_t *get_filter_5tap_64p(struct fixed31_32 ratio) in get_filter_5tap_64p()
1401 const uint16_t *get_filter_6tap_64p(struct fixed31_32 ratio) in get_filter_6tap_64p()
1413 const uint16_t *get_filter_7tap_64p(struct fixed31_32 ratio) in get_filter_7tap_64p()
1425 const uint16_t *get_filter_8tap_64p(struct fixed31_32 ratio) in get_filter_8tap_64p()
Ddce_transform.c282 struct fixed31_32 h_init; in calculate_inits()
283 struct fixed31_32 v_init; in calculate_inits()
315 struct fixed31_32 v_init; in dce60_calculate_inits()
391 static const uint16_t *get_filter_coeffs_16p(int taps, struct fixed31_32 ratio) in get_filter_coeffs_16p()
1128 struct fixed31_32 arr_matrix[GAMUT_MATRIX_SIZE]; in dce_transform_set_gamut_remap()
1141 static uint32_t decide_taps(struct fixed31_32 ratio, uint32_t in_taps, bool chroma) in decide_taps()
Ddce_clock_source.c652 struct fixed31_32 fb_div; in calculate_ss()
653 struct fixed31_32 ss_amount; in calculate_ss()
654 struct fixed31_32 ss_nslip_amount; in calculate_ss()
655 struct fixed31_32 ss_ds_frac_amount; in calculate_ss()
656 struct fixed31_32 ss_step_size; in calculate_ss()
657 struct fixed31_32 modulation_time; in calculate_ss()
/drivers/gpu/drm/amd/display/dc/calcs/
Dcustom_float.c30 struct fixed31_32 value, in build_custom_float()
38 const struct fixed31_32 mantissa_constant_plus_max_fraction = in build_custom_float()
43 struct fixed31_32 mantiss; in build_custom_float()
183 struct fixed31_32 value, in convert_to_custom_float_format()
/drivers/gpu/drm/amd/display/dc/
Ddc_hw_types.h423 struct fixed31_32 h_scale_ratio;
424 struct fixed31_32 v_scale_ratio;
452 struct fixed31_32 red;
453 struct fixed31_32 green;
454 struct fixed31_32 blue;
463 struct fixed31_32 red[GAMMA_MAX_ENTRIES];
464 struct fixed31_32 green[GAMMA_MAX_ENTRIES];
465 struct fixed31_32 blue[GAMMA_MAX_ENTRIES];
Ddc_types.h365 struct fixed31_32 contrast;
366 struct fixed31_32 saturation;
367 struct fixed31_32 brightness;
368 struct fixed31_32 hue;
446 struct fixed31_32 temperature_matrix[12];
763 struct fixed31_32 matrix[12];
Ddc.h788 struct fixed31_32 red[TRANSFER_FUNC_POINTS];
789 struct fixed31_32 green[TRANSFER_FUNC_POINTS];
790 struct fixed31_32 blue[TRANSFER_FUNC_POINTS];
842 struct fixed31_32 hdr_multiplier;
911 struct fixed31_32 coeff_reduction_factor;
912 struct fixed31_32 hdr_mult;
987 struct fixed31_32 hdr_mult;
995 const struct fixed31_32 *coeff_reduction_factor;
/drivers/gpu/drm/amd/display/dc/dsc/
Ddc_dsc.c79 static struct fixed31_32 compute_dsc_max_bandwidth_overhead(
465 static struct fixed31_32 compute_dsc_max_bandwidth_overhead( in compute_dsc_max_bandwidth_overhead()
470 struct fixed31_32 max_dsc_overhead; in compute_dsc_max_bandwidth_overhead()
471 struct fixed31_32 refresh_rate; in compute_dsc_max_bandwidth_overhead()
498 struct fixed31_32 overhead_in_kbps; in compute_bpp_x16_from_target_bandwidth()
499 struct fixed31_32 effective_bandwidth_in_kbps; in compute_bpp_x16_from_target_bandwidth()
500 struct fixed31_32 bpp_x16; in compute_bpp_x16_from_target_bandwidth()
997 struct fixed31_32 overhead_in_kbps; in dc_dsc_stream_bandwidth_in_kbps()
998 struct fixed31_32 bpp; in dc_dsc_stream_bandwidth_in_kbps()
999 struct fixed31_32 actual_bandwidth_in_kbps; in dc_dsc_stream_bandwidth_in_kbps()
/drivers/gpu/drm/amd/display/dc/inc/
Dcustom_float.h35 struct fixed31_32 value,
/drivers/gpu/drm/amd/display/dc/virtual/
Dvirtual_stream_encoder.c51 struct fixed31_32 avg_time_slots_per_mtp) in virtual_stream_encoder_set_throttled_vcp_size()
/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/
Ddce_clk_mgr.c117 struct fixed31_32 ss_percentage = dc_fixpt_div_int( in dce_adjust_dp_ref_freq_for_ss()
120 struct fixed31_32 adj_dp_ref_clk_khz; in dce_adjust_dp_ref_freq_for_ss()
/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_dpp_dscl.c252 static const uint16_t *dpp1_dscl_get_filter_coeffs_64p(int taps, struct fixed31_32 ratio) in dpp1_dscl_get_filter_coeffs_64p()
639 struct fixed31_32 bot = dc_fixpt_add(data->inits.v, data->ratios.vert); in dpp1_dscl_set_manual_ratio_init()
655 struct fixed31_32 bot = dc_fixpt_add(data->inits.v_c, data->ratios.vert_c); in dpp1_dscl_set_manual_ratio_init()

12