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Searched refs:fuse (Results 1 – 25 of 27) sorted by relevance

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/drivers/soc/tegra/fuse/
Dfuse-tegra20.c30 static u32 tegra20_fuse_read_early(struct tegra_fuse *fuse, unsigned int offset) in tegra20_fuse_read_early() argument
32 return readl_relaxed(fuse->base + FUSE_BEGIN + offset); in tegra20_fuse_read_early()
37 struct tegra_fuse *fuse = args; in apb_dma_complete() local
39 complete(&fuse->apbdma.wait); in apb_dma_complete()
42 static u32 tegra20_fuse_read(struct tegra_fuse *fuse, unsigned int offset) in tegra20_fuse_read() argument
50 err = pm_runtime_resume_and_get(fuse->dev); in tegra20_fuse_read()
54 mutex_lock(&fuse->apbdma.lock); in tegra20_fuse_read()
56 fuse->apbdma.config.src_addr = fuse->phys + FUSE_BEGIN + offset; in tegra20_fuse_read()
58 err = dmaengine_slave_config(fuse->apbdma.chan, &fuse->apbdma.config); in tegra20_fuse_read()
62 dma_desc = dmaengine_prep_slave_single(fuse->apbdma.chan, in tegra20_fuse_read()
[all …]
Dfuse-tegra.c47 static struct tegra_fuse *fuse = &(struct tegra_fuse) { variable
87 struct tegra_fuse *fuse = priv; in tegra_fuse_read() local
91 buffer[i] = fuse->read(fuse, offset + i * 4); in tegra_fuse_read()
186 void __iomem *base = fuse->base; in tegra_fuse_probe()
193 fuse->phys = res->start; in tegra_fuse_probe()
194 fuse->base = devm_ioremap_resource(&pdev->dev, res); in tegra_fuse_probe()
195 if (IS_ERR(fuse->base)) { in tegra_fuse_probe()
196 err = PTR_ERR(fuse->base); in tegra_fuse_probe()
197 fuse->base = base; in tegra_fuse_probe()
201 fuse->clk = devm_clk_get(&pdev->dev, "fuse"); in tegra_fuse_probe()
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Dfuse-tegra30.c43 static u32 tegra30_fuse_read_early(struct tegra_fuse *fuse, unsigned int offset) in tegra30_fuse_read_early() argument
45 if (WARN_ON(!fuse->base)) in tegra30_fuse_read_early()
48 return readl_relaxed(fuse->base + FUSE_BEGIN + offset); in tegra30_fuse_read_early()
51 static u32 tegra30_fuse_read(struct tegra_fuse *fuse, unsigned int offset) in tegra30_fuse_read() argument
56 err = pm_runtime_resume_and_get(fuse->dev); in tegra30_fuse_read()
60 value = readl_relaxed(fuse->base + FUSE_BEGIN + offset); in tegra30_fuse_read()
62 pm_runtime_put(fuse->dev); in tegra30_fuse_read()
89 static void __init tegra30_fuse_init(struct tegra_fuse *fuse) in tegra30_fuse_init() argument
91 fuse->read_early = tegra30_fuse_read_early; in tegra30_fuse_init()
92 fuse->read = tegra30_fuse_read; in tegra30_fuse_init()
[all …]
Dfuse.h21 u32 (*read)(struct tegra_fuse *fuse, unsigned int offset);
27 void (*init)(struct tegra_fuse *fuse);
29 int (*probe)(struct tegra_fuse *fuse);
47 u32 (*read_early)(struct tegra_fuse *fuse, unsigned int offset);
48 u32 (*read)(struct tegra_fuse *fuse, unsigned int offset);
DMakefile2 obj-y += fuse-tegra.o
3 obj-y += fuse-tegra30.o
5 obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += fuse-tegra20.o
/drivers/soc/qcom/
Dcpr.c367 struct fuse_corner *fuse = corner->fuse_corner; in cpr_corner_restore() local
371 ro_sel = fuse->ring_osc_idx; in cpr_corner_restore()
373 gcnt |= fuse->quot - corner->quot_adjust; in cpr_corner_restore()
377 step_quot |= fuse->step_quot & RBCPR_STEP_QUOT_STEPQUOT_MASK; in cpr_corner_restore()
807 struct fuse_corner *fuse = drv->fuse_corners; in cpr_populate_ring_osc_idx() local
808 struct fuse_corner *end = fuse + drv->desc->num_fuse_corners; in cpr_populate_ring_osc_idx()
813 for (; fuse < end; fuse++, fuses++) { in cpr_populate_ring_osc_idx()
817 fuse->ring_osc_idx = data; in cpr_populate_ring_osc_idx()
856 struct fuse_corner *fuse, *end; in cpr_fuse_corner_init() local
868 fuse = drv->fuse_corners; in cpr_fuse_corner_init()
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/drivers/gpu/drm/nouveau/nvkm/subdev/fuse/
Dbase.c27 nvkm_fuse_read(struct nvkm_fuse *fuse, u32 addr) in nvkm_fuse_read() argument
29 return fuse->func->read(fuse, addr); in nvkm_fuse_read()
47 struct nvkm_fuse *fuse; in nvkm_fuse_new_() local
48 if (!(fuse = *pfuse = kzalloc(sizeof(*fuse), GFP_KERNEL))) in nvkm_fuse_new_()
50 nvkm_subdev_ctor(&nvkm_fuse, device, type, inst, &fuse->subdev); in nvkm_fuse_new_()
51 fuse->func = func; in nvkm_fuse_new_()
52 spin_lock_init(&fuse->lock); in nvkm_fuse_new_()
DKbuild2 nvkm-y += nvkm/subdev/fuse/base.o
3 nvkm-y += nvkm/subdev/fuse/nv50.o
4 nvkm-y += nvkm/subdev/fuse/gf100.o
5 nvkm-y += nvkm/subdev/fuse/gm107.o
Dnv50.c27 nv50_fuse_read(struct nvkm_fuse *fuse, u32 addr) in nv50_fuse_read() argument
29 struct nvkm_device *device = fuse->subdev.device; in nv50_fuse_read()
34 spin_lock_irqsave(&fuse->lock, flags); in nv50_fuse_read()
38 spin_unlock_irqrestore(&fuse->lock, flags); in nv50_fuse_read()
Dgf100.c27 gf100_fuse_read(struct nvkm_fuse *fuse, u32 addr) in gf100_fuse_read() argument
29 struct nvkm_device *device = fuse->subdev.device; in gf100_fuse_read()
34 spin_lock_irqsave(&fuse->lock, flags); in gf100_fuse_read()
40 spin_unlock_irqrestore(&fuse->lock, flags); in gf100_fuse_read()
Dgm107.c27 gm107_fuse_read(struct nvkm_fuse *fuse, u32 addr) in gm107_fuse_read() argument
29 struct nvkm_device *device = fuse->subdev.device; in gm107_fuse_read()
/drivers/gpu/drm/nouveau/nvkm/subdev/volt/
Dgf117.c32 struct nvkm_fuse *fuse = device->fuse; in gf117_volt_speedo_read() local
34 if (!fuse) in gf117_volt_speedo_read()
37 return nvkm_fuse_read(fuse, 0x3a8); in gf117_volt_speedo_read()
Dgf100.c32 struct nvkm_fuse *fuse = device->fuse; in gf100_volt_speedo_read() local
34 if (!fuse) in gf100_volt_speedo_read()
37 return nvkm_fuse_read(fuse, 0x1cc); in gf100_volt_speedo_read()
Dgk104.c72 struct nvkm_fuse *fuse = device->fuse; in gk104_volt_speedo_read() local
75 if (!fuse) in gk104_volt_speedo_read()
79 ret = nvkm_fuse_read(fuse, 0x3a8); in gk104_volt_speedo_read()
/drivers/gpu/drm/nouveau/nvkm/engine/device/
Dbase.c819 .fuse = { 0x00000001, nv50_fuse_new },
926 .fuse = { 0x00000001, nv50_fuse_new },
958 .fuse = { 0x00000001, nv50_fuse_new },
990 .fuse = { 0x00000001, nv50_fuse_new },
1022 .fuse = { 0x00000001, nv50_fuse_new },
1054 .fuse = { 0x00000001, nv50_fuse_new },
1086 .fuse = { 0x00000001, nv50_fuse_new },
1118 .fuse = { 0x00000001, nv50_fuse_new },
1150 .fuse = { 0x00000001, nv50_fuse_new },
1184 .fuse = { 0x00000001, nv50_fuse_new },
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/drivers/gpu/drm/i915/gt/
Dintel_sseu.c213 u32 fuse; in cherryview_sseu_info_init() local
216 fuse = intel_uncore_read(gt->uncore, CHV_FUSE_GT); in cherryview_sseu_info_init()
221 if (!(fuse & CHV_FGT_DISABLE_SS0)) { in cherryview_sseu_info_init()
223 ((fuse & CHV_FGT_EU_DIS_SS0_R0_MASK) >> in cherryview_sseu_info_init()
225 (((fuse & CHV_FGT_EU_DIS_SS0_R1_MASK) >> in cherryview_sseu_info_init()
232 if (!(fuse & CHV_FGT_DISABLE_SS1)) { in cherryview_sseu_info_init()
234 ((fuse & CHV_FGT_EU_DIS_SS1_R0_MASK) >> in cherryview_sseu_info_init()
236 (((fuse & CHV_FGT_EU_DIS_SS1_R1_MASK) >> in cherryview_sseu_info_init()
/drivers/phy/tegra/
Dxusb-tegra124.c216 struct tegra124_xusb_fuse_calibration fuse; member
503 value |= (priv->fuse.hs_squelch_level << in tegra124_usb2_phy_power_on()
526 value |= (priv->fuse.hs_curr_level[index] + in tegra124_usb2_phy_power_on()
543 value |= (priv->fuse.hs_term_range_adj << in tegra124_usb2_phy_power_on()
545 (priv->fuse.hs_iref_cap << in tegra124_usb2_phy_power_on()
1662 tegra124_xusb_read_fuse_calibration(struct tegra124_xusb_fuse_calibration *fuse) in tegra124_xusb_read_fuse_calibration() argument
1672 for (i = 0; i < ARRAY_SIZE(fuse->hs_curr_level); i++) { in tegra124_xusb_read_fuse_calibration()
1673 fuse->hs_curr_level[i] = in tegra124_xusb_read_fuse_calibration()
1677 fuse->hs_iref_cap = in tegra124_xusb_read_fuse_calibration()
1680 fuse->hs_term_range_adj = in tegra124_xusb_read_fuse_calibration()
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/drivers/net/wireless/ti/wl18xx/
Dmain.c1344 u32 fuse; in wl18xx_get_pg_ver() local
1352 ret = wlcore_read32(wl, WL18XX_REG_FUSE_DATA_2_3, &fuse); in wl18xx_get_pg_ver()
1356 package_type = (fuse >> WL18XX_PACKAGE_TYPE_OFFSET) & 1; in wl18xx_get_pg_ver()
1358 ret = wlcore_read32(wl, WL18XX_REG_FUSE_DATA_1_3, &fuse); in wl18xx_get_pg_ver()
1362 pg_ver = (fuse & WL18XX_PG_VER_MASK) >> WL18XX_PG_VER_OFFSET; in wl18xx_get_pg_ver()
1363 rom = (fuse & WL18XX_ROM_VER_MASK) >> WL18XX_ROM_VER_OFFSET; in wl18xx_get_pg_ver()
1366 metal = (fuse & WL18XX_METAL_VER_MASK) >> in wl18xx_get_pg_ver()
1369 metal = (fuse & WL18XX_NEW_METAL_VER_MASK) >> in wl18xx_get_pg_ver()
1372 ret = wlcore_read32(wl, WL18XX_REG_FUSE_DATA_2_3, &fuse); in wl18xx_get_pg_ver()
1376 rdl_ver = (fuse & WL18XX_RDL_VER_MASK) >> WL18XX_RDL_VER_OFFSET; in wl18xx_get_pg_ver()
/drivers/gpu/drm/nouveau/nvkm/subdev/therm/
Dg84.c34 if (nvkm_fuse_read(device->fuse, 0x1a8) == 1) in g84_temp_get()
46 if (nvkm_fuse_read(device->fuse, 0x1a8) == 1) { in g84_sensor_setup()
/drivers/soc/tegra/
DMakefile2 obj-y += fuse/
/drivers/thermal/tegra/
DMakefile6 tegra-soctherm-y := soctherm.o soctherm-fuse.o
/drivers/gpu/drm/msm/adreno/
Da6xx_gpu.c1728 static u32 a618_get_speed_bin(u32 fuse) in a618_get_speed_bin() argument
1730 if (fuse == 0) in a618_get_speed_bin()
1732 else if (fuse == 169) in a618_get_speed_bin()
1734 else if (fuse == 174) in a618_get_speed_bin()
1740 static u32 fuse_to_supp_hw(struct device *dev, struct adreno_rev rev, u32 fuse) in fuse_to_supp_hw() argument
1745 val = a618_get_speed_bin(fuse); in fuse_to_supp_hw()
1750 fuse); in fuse_to_supp_hw()
/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/
Dgk104.c61 if (!(nvkm_fuse_read(device->fuse, 0x31c) & 0x00000001)) in gk104_pmu_pgob()
/drivers/gpu/drm/nouveau/nvkm/subdev/
DKbuild10 include $(src)/nvkm/subdev/fuse/Kbuild
/drivers/gpu/drm/nouveau/include/nvkm/core/
Dlayout.h9 NVKM_LAYOUT_ONCE(NVKM_SUBDEV_FUSE , struct nvkm_fuse , fuse)

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