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Searched refs:gvmi (Results 1 – 11 of 11) sorted by relevance

/drivers/net/ethernet/mellanox/mlx5/core/steering/
Ddr_ste_v1.c311 static void dr_ste_v1_set_hit_gvmi(u8 *hw_ste_p, u16 gvmi) in dr_ste_v1_set_hit_gvmi() argument
313 MLX5_SET(ste_match_bwc_v1, hw_ste_p, next_table_base_63_48, gvmi); in dr_ste_v1_set_hit_gvmi()
325 bool is_rx, u16 gvmi) in dr_ste_v1_init() argument
330 MLX5_SET(ste_match_bwc_v1, hw_ste_p, gvmi, gvmi); in dr_ste_v1_init()
331 MLX5_SET(ste_match_bwc_v1, hw_ste_p, next_table_base_63_48, gvmi); in dr_ste_v1_init()
332 MLX5_SET(ste_match_bwc_v1, hw_ste_p, miss_address_63_48, gvmi); in dr_ste_v1_init()
500 u16 gvmi) in dr_ste_v1_arr_init_next_match() argument
506 dr_ste_v1_init(*last_ste, MLX5DR_STE_LU_TYPE_DONT_CARE, 0, gvmi); in dr_ste_v1_arr_init_next_match()
527 attr->gvmi); in dr_ste_v1_set_actions_tx()
544 attr->gvmi); in dr_ste_v1_set_actions_tx()
[all …]
Ddr_ste_v0.c288 static void dr_ste_v0_set_hit_gvmi(u8 *hw_ste_p, u16 gvmi) in dr_ste_v0_set_hit_gvmi() argument
290 MLX5_SET(ste_general, hw_ste_p, next_table_base_63_48, gvmi); in dr_ste_v0_set_hit_gvmi()
302 enum dr_ste_v0_entry_type entry_type, u16 gvmi) in dr_ste_v0_init_full() argument
311 MLX5_SET(ste_rx_steering_mult, hw_ste_p, gvmi, gvmi); in dr_ste_v0_init_full()
312 MLX5_SET(ste_rx_steering_mult, hw_ste_p, next_table_base_63_48, gvmi); in dr_ste_v0_init_full()
313 MLX5_SET(ste_rx_steering_mult, hw_ste_p, miss_address_63_48, gvmi); in dr_ste_v0_init_full()
317 bool is_rx, u16 gvmi) in dr_ste_v0_init() argument
322 dr_ste_v0_init_full(hw_ste_p, lu_type, entry_type, gvmi); in dr_ste_v0_init()
399 u16 gvmi) in dr_ste_v0_arr_init_next() argument
404 entry_type, gvmi); in dr_ste_v0_arr_init_next()
[all …]
Dmlx5_ifc_dr.h55 u8 gvmi[0x10]; member
91 u8 gvmi[0x10]; member
129 u8 gvmi[0x10]; member
Ddr_domain.c153 vport_caps->vhca_gvmi = dmn->info.caps.gvmi; in dr_domain_query_vport()
178 wire_vport->vhca_gvmi = dmn->info.caps.gvmi; in dr_domain_query_vports()
Ddr_types.h267 u16 gvmi; member
776 u16 gvmi; member
1153 bool other_vport, u16 vport_number, u16 *gvmi);
1246 u16 gvmi,
Ddr_action.c565 attr.gvmi = dmn->info.caps.gvmi; in mlx5dr_actions_build_ste_arr()
566 attr.hit_gvmi = dmn->info.caps.gvmi; in mlx5dr_actions_build_ste_arr()
731 attr.gvmi, rx_rule); in mlx5dr_actions_build_ste_arr()
1761 peer_vport = vhca_id_valid && (vhca_id != dmn->info.caps.gvmi); in mlx5dr_action_create_dest_vport()
Ddr_cmd.c35 u16 vport_number, u16 *gvmi) in mlx5dr_cmd_query_gvmi() argument
60 *gvmi = MLX5_GET(query_hca_cap_out, out, capability.cmd_hca_cap.vhca_id); in mlx5dr_cmd_query_gvmi()
117 caps->gvmi = MLX5_CAP_GEN(mdev, vhca_id); in mlx5dr_cmd_query_device()
Ddr_ste.h149 bool is_rx, u16 gvmi);
Ddr_ste.c382 u16 gvmi, in mlx5dr_ste_set_formatted_ste() argument
391 ste_ctx->ste_init(formatted_ste, htbl->lu_type, is_rx, gvmi); in mlx5dr_ste_set_formatted_ste()
409 dmn->info.caps.gvmi, in mlx5dr_ste_htbl_init_and_postsend()
680 dmn->info.caps.gvmi); in mlx5dr_ste_build_ste_arr()
Dmlx5_ifc_dr_ste_v1.h137 u8 gvmi[0xe]; member
Ddr_rule.c408 dmn->info.caps.gvmi, in dr_rule_rehash_htbl()