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Searched refs:gws (Results 1 – 14 of 14) sorted by relevance

/drivers/gpu/drm/amd/amdkfd/
Dkfd_process_queue_manager.c79 void *gws) in pqm_set_gws() argument
105 if (gws && pdd->qpd.num_gws) in pqm_set_gws()
108 if (!gws && pdd->qpd.num_gws == 0) in pqm_set_gws()
111 if (gws) in pqm_set_gws()
113 gws, &mem); in pqm_set_gws()
116 pqn->q->gws); in pqm_set_gws()
120 pqn->q->gws = mem; in pqm_set_gws()
121 pdd->qpd.num_gws = gws ? amdgpu_amdkfd_get_num_gws(dev->kgd) : 0; in pqm_set_gws()
153 if (pqn->q && pqn->q->gws) in pqm_uninit()
155 pqn->q->gws); in pqm_uninit()
[all …]
Dkfd_device.c789 amdgpu_amdkfd_get_num_gws(kfd->kgd), &kfd->gws); in kfd_gws_init()
961 if (kfd->gws) in kgd2kfd_device_init()
962 amdgpu_amdkfd_free_gws(kfd->kgd, kfd->gws); in kgd2kfd_device_init()
980 if (kfd->gws) in kgd2kfd_device_exit()
981 amdgpu_amdkfd_free_gws(kfd->kgd, kfd->gws); in kgd2kfd_device_exit()
Dkfd_priv.h315 void *gws; member
534 void *gws; member
1040 void *gws);
Dkfd_packet_manager_v9.c198 packet->bitfields2.gws_control_queue = q->gws ? 1 : 0; in pm_map_queues_v9()
Dkfd_chardev.c1624 if (!dev->gws) { in kfd_ioctl_alloc_queue_gws()
1634 retval = pqm_set_gws(&p->pqm, args->queue_id, args->num_gws ? dev->gws : NULL); in kfd_ioctl_alloc_queue_gws()
Dkfd_device_queue_manager.c629 } else if (q->gws && !q->properties.is_gws) { in update_queue()
635 } else if (!q->gws && q->properties.is_gws) { in update_queue()
Dkfd_topology.c1387 dev->node_props.num_gws = (dev->gpu->gws && in kfd_topology_add_device()
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_gds.h40 uint32_t gws; member
Damdgpu_cs.c489 struct amdgpu_bo *gws; in amdgpu_cs_parser_bos() local
603 gws = p->bo_list->gws_obj; in amdgpu_cs_parser_bos()
610 if (gws) { in amdgpu_cs_parser_bos()
611 p->job->gws_base = amdgpu_bo_gpu_offset(gws) >> PAGE_SHIFT; in amdgpu_cs_parser_bos()
612 p->job->gws_size = amdgpu_bo_size(gws) >> PAGE_SHIFT; in amdgpu_cs_parser_bos()
Damdgpu_amdkfd.h207 int amdgpu_amdkfd_add_gws_to_process(void *info, void *gws, struct kgd_mem **mem);
Damdgpu_amdkfd_gpuvm.c2421 int amdgpu_amdkfd_add_gws_to_process(void *info, void *gws, struct kgd_mem **mem) in amdgpu_amdkfd_add_gws_to_process() argument
2424 struct amdgpu_bo *gws_bo = (struct amdgpu_bo *)gws; in amdgpu_amdkfd_add_gws_to_process()
2427 if (!info || !gws) in amdgpu_amdkfd_add_gws_to_process()
Dgfx_v7_0.c1884 WREG32(amdgpu_gds_reg_offset[i].gws, 0); in gfx_v7_0_init_compute_vmid()
1902 WREG32(amdgpu_gds_reg_offset[vmid].gws, 0); in gfx_v7_0_init_gds_vmid()
4129 amdgpu_ring_write(ring, amdgpu_gds_reg_offset[vmid].gws); in gfx_v7_0_ring_emit_gds_switch()
Dgfx_v8_0.c3737 WREG32(amdgpu_gds_reg_offset[i].gws, 0); in gfx_v8_0_init_compute_vmid()
3755 WREG32(amdgpu_gds_reg_offset[vmid].gws, 0); in gfx_v8_0_init_gds_vmid()
5222 amdgpu_ring_write(ring, amdgpu_gds_reg_offset[vmid].gws); in gfx_v8_0_ring_emit_gds_switch()
/drivers/dma/
Dat_xdmac.c195 u8 gws; member
283 .gws = 0x2C,
296 .gws = 0x38,