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Searched refs:hactive (Results 1 – 25 of 56) sorted by relevance

123

/drivers/gpu/drm/panel/
Dpanel-olimex-lcd-olinuxino.c29 u32 hactive; member
154 lcd_mode->hactive, in lcd_olinuxino_get_modes()
161 mode->hdisplay = lcd_mode->hactive; in lcd_olinuxino_get_modes()
162 mode->hsync_start = lcd_mode->hactive + lcd_mode->hfp; in lcd_olinuxino_get_modes()
163 mode->hsync_end = lcd_mode->hactive + lcd_mode->hfp + in lcd_olinuxino_get_modes()
165 mode->htotal = lcd_mode->hactive + lcd_mode->hfp + in lcd_olinuxino_get_modes()
Dpanel-simple.c221 dt->hactive.typ, dt->vactive.typ); in panel_simple_get_timings_modes()
639 if (!PANEL_SIMPLE_BOUNDS_CHECK(ot, dt, hactive) || in panel_simple_parse_panel_timing_node()
925 .hactive = { 800, 800, 800 },
976 .hactive = { 1280, 1280, 1280 },
1187 .hactive = { 800, 800, 800 },
1263 .hactive = { 1280, 1280, 1280 },
1287 .hactive = { 1920, 1920, 1920 },
1341 .hactive = { 1920, 1920, 1920 },
1371 .hactive = { 1280, 1280, 1280 },
1401 .hactive = { 1920, 1920, 1920 },
[all …]
Dpanel-seiko-43wvf1g.c74 dt->hactive.typ, dt->vactive.typ); in seiko_panel_get_fixed_modes()
287 .hactive = { 800, 800, 800 },
/drivers/video/fbdev/geode/
Ddisplay_gx.c61 int hactive, hblankstart, hsyncstart, hsyncend, hblankend, htotal; in gx_set_mode() local
129 hactive = info->var.xres; in gx_set_mode()
130 hblankstart = hactive; in gx_set_mode()
143 write_dc(par, DC_H_ACTIVE_TIMING, (hactive - 1) | in gx_set_mode()
Ddisplay_gx1.c81 int hactive, hblankstart, hsyncstart, hsyncend, hblankend, htotal; in gx1_set_mode() local
147 hactive = info->var.xres; in gx1_set_mode()
148 hblankstart = hactive; in gx1_set_mode()
161 val = (hactive - 1) | ((htotal - 1) << 16); in gx1_set_mode()
Dlxfb_ops.c349 int hactive, hblankstart, hsyncstart, hsyncend, hblankend, htotal; in lx_set_mode() local
464 hactive = info->var.xres; in lx_set_mode()
465 hblankstart = hactive; in lx_set_mode()
478 write_dc(par, DC_H_ACTIVE_TIMING, (hactive - 1) | ((htotal - 1) << 16)); in lx_set_mode()
/drivers/gpu/ipu-v3/
Dipu-di.c205 u32 h_total = sig->mode.hactive + sig->mode.hsync_len + in ipu_di_sync_config_interlaced()
251 .repeat_count = sig->mode.hactive, in ipu_di_sync_config_interlaced()
268 u32 h_total = sig->mode.hactive + sig->mode.hsync_len + in ipu_di_sync_config_noninterlaced()
307 .repeat_count = sig->mode.hactive, in ipu_di_sync_config_noninterlaced()
348 .repeat_count = sig->mode.hactive, in ipu_di_sync_config_noninterlaced()
510 if (!IS_ALIGNED(mode->hactive, 8) && in ipu_di_adjust_videomode()
511 mode->hfront_porch < ALIGN(mode->hactive, 8) - mode->hactive) { in ipu_di_adjust_videomode()
513 mode->hactive); in ipu_di_adjust_videomode()
568 di->id, sig->mode.hactive, sig->mode.vactive); in ipu_di_init_sync_panel()
/drivers/gpu/drm/imx/
Dipuv3-crtc.c308 if (!IS_ALIGNED(sig_cfg.mode.hactive, 8)) { in ipu_crtc_mode_set_nofb()
309 unsigned int new_hactive = ALIGN(sig_cfg.mode.hactive, 8); in ipu_crtc_mode_set_nofb()
312 sig_cfg.mode.hactive, new_hactive); in ipu_crtc_mode_set_nofb()
314 sig_cfg.mode.hfront_porch -= new_hactive - sig_cfg.mode.hactive; in ipu_crtc_mode_set_nofb()
315 sig_cfg.mode.hactive = new_hactive; in ipu_crtc_mode_set_nofb()
320 imx_crtc_state->bus_format, sig_cfg.mode.hactive); in ipu_crtc_mode_set_nofb()
/drivers/media/i2c/
Dbt819.c61 int hactive; member
181 ((timing->hactive >> 8) & 0x03); in bt819_init()
185 init[0x07 * 2 - 1] = timing->hactive & 0xff; in bt819_init()
272 ((timing->hactive >> 8) & 0x03)); in bt819_s_std()
276 bt819_write(decoder, 0x07, timing->hactive & 0xff); in bt819_s_std()
/drivers/video/
Dvideomode.c17 vm->hactive = dt->hactive.typ; in videomode_from_timing()
/drivers/gpu/drm/imx/dcss/
Ddcss-ss.c136 vm->hactive - 1; in dcss_ss_sync_set()
143 vm->hactive - 1; in dcss_ss_sync_set()
163 de_lrc_x = vm->hsync_len + vm->hback_porch + vm->hactive - 1; in dcss_ss_sync_set()
/drivers/gpu/drm/bridge/
Dtc358775.c378 u32 hback_porch, hsync_len, hfront_porch, hactive, htime1, htime2; in tc_bridge_enable() local
396 hactive = mode->hdisplay; in tc_bridge_enable()
400 htime2 = (hfront_porch << 16) + hactive; in tc_bridge_enable()
434 t1 = hactive * (tc->bpc * 3 / 8) / tc->num_dsi_lanes; in tc_bridge_enable()
435 t2 = ((100000 / clkdiv)) * (hactive + hback_porch + hsync_len + hfront_porch) / 1000; in tc_bridge_enable()
436 t3 = ((t2 * byteclk) / 100) - (hactive * (tc->bpc * 3 / 8) / in tc_bridge_enable()
439 vsdelay = (clkdiv * (t1 + t3) / byteclk) - hback_porch - hsync_len - hactive; in tc_bridge_enable()
Dlontium-lt8912b.c265 u32 hactive, h_total, hpw, hfp, hbp; in lt8912_video_setup() local
273 hactive = lt->mode.hactive; in lt8912_video_setup()
277 h_total = hactive + hfp + hpw + hbp; in lt8912_video_setup()
296 ret |= regmap_write(lt->regmap[I2C_CEC_DSI], 0x1c, hactive & 0xff); in lt8912_video_setup()
297 ret |= regmap_write(lt->regmap[I2C_CEC_DSI], 0x1d, hactive >> 8); in lt8912_video_setup()
/drivers/video/fbdev/core/
Dfbmon.c1020 u32 hactive; member
1154 timings->hactive); in fb_timings_vfreq()
1155 timings->htotal = timings->hactive + timings->hblank; in fb_timings_vfreq()
1165 timings->hactive); in fb_timings_hfreq()
1166 timings->htotal = timings->hactive + timings->hblank; in fb_timings_hfreq()
1173 timings->hactive); in fb_timings_dclk()
1174 timings->htotal = timings->hactive + timings->hblank; in fb_timings_dclk()
1248 timings->hactive = var->xres; in fb_get_mode()
1316 fbmode->xres = vm->hactive; in fb_videomode_from_videomode()
1342 htotal = vm->hactive + vm->hfront_porch + vm->hback_porch + in fb_videomode_from_videomode()
[all …]
/drivers/gpu/drm/xen/
Dxen_drm_front_conn.c74 videomode.hactive = pipeline->width; in connector_get_modes()
76 width = videomode.hactive + videomode.hfront_porch + in connector_get_modes()
/drivers/gpu/drm/exynos/
Dexynos_drm_mic.c170 MIC_V_PERIOD_LINE(vm.hsync_len + vm.hactive + in mic_set_porch_timing()
184 reg = MIC_IMG_H_SIZE(vm->hactive) + in mic_set_img_size()
195 DRM_DEV_DEBUG(mic->dev, "w: %u, h: %u\n", vm.hactive, vm.vactive); in mic_set_output_timing()
196 bs_size_2d = ((vm.hactive >> 2) << 1) + (vm.vactive % 4); in mic_set_output_timing()
/drivers/gpu/drm/amd/display/dc/dml/dcn31/
Ddisplay_rq_dlg_calc_31.c135 unsigned int hactive, in get_refcyc_per_delivery() argument
146 …* dml_min((double) recout_width, (double) hactive / ((unsigned int) odm_combine * 2)) / pclk_freq_… in get_refcyc_per_delivery()
775 hactive_odm = pipe_param->dest.hactive / ((unsigned int) pipe_param->dest.odm_combine * 2); in get_surf_rq_param()
1203 … = (unsigned int) (((double) hblank_end + odm_pipe_index * (double) dst->hactive / odm_combine_fac… in dml_rq_dlg_get_dlg_params()
1332 dst->hactive, in dml_rq_dlg_get_dlg_params()
1344 dst->hactive, in dml_rq_dlg_get_dlg_params()
1370 dst->hactive, in dml_rq_dlg_get_dlg_params()
1382 dst->hactive, in dml_rq_dlg_get_dlg_params()
1417 dst->hactive, in dml_rq_dlg_get_dlg_params()
1429 dst->hactive, in dml_rq_dlg_get_dlg_params()
[all …]
/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddisplay_rq_dlg_calc_30.c48 unsigned int hactive, in get_refcyc_per_delivery() argument
59 * dml_min((double)recout_width, (double)hactive / ((unsigned int)odm_combine*2)) in get_refcyc_per_delivery()
783 hactive_odm = pipe_param->dest.hactive / ((unsigned int) pipe_param->dest.odm_combine*2); in get_surf_rq_param()
1310 …d = (unsigned int)(((double) hblank_end + odm_pipe_index * (double) dst->hactive / odm_combine_fac… in dml_rq_dlg_get_dlg_params()
1468 dst->hactive, in dml_rq_dlg_get_dlg_params()
1479 dst->hactive, in dml_rq_dlg_get_dlg_params()
1504 dst->hactive, in dml_rq_dlg_get_dlg_params()
1515 dst->hactive, in dml_rq_dlg_get_dlg_params()
1558 dst->hactive, in dml_rq_dlg_get_dlg_params()
1568 dst->hactive, in dml_rq_dlg_get_dlg_params()
[all …]
/drivers/gpu/drm/amd/display/dc/dml/dcn21/
Ddisplay_rq_dlg_calc_21.c99 unsigned int hactive, in get_refcyc_per_delivery() argument
110 * dml_min((double) recout_width, (double) hactive / 2.0) in get_refcyc_per_delivery()
726 hactive_half = pipe_param->dest.hactive / 2; in get_surf_rq_param()
1280 dst->hactive, in dml_rq_dlg_get_dlg_params()
1292 dst->hactive, in dml_rq_dlg_get_dlg_params()
1319 dst->hactive, in dml_rq_dlg_get_dlg_params()
1331 dst->hactive, in dml_rq_dlg_get_dlg_params()
1362 dst->hactive, in dml_rq_dlg_get_dlg_params()
1373 dst->hactive, in dml_rq_dlg_get_dlg_params()
1398 dst->hactive, in dml_rq_dlg_get_dlg_params()
[all …]
/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddisplay_rq_dlg_calc_20v2.c123 unsigned int hactive, in get_refcyc_per_delivery() argument
134 * dml_min((double) recout_width, (double) hactive / 2.0) in get_refcyc_per_delivery()
1227 dst->hactive, in dml20v2_rq_dlg_get_dlg_params()
1238 dst->hactive, in dml20v2_rq_dlg_get_dlg_params()
1263 dst->hactive, in dml20v2_rq_dlg_get_dlg_params()
1274 dst->hactive, in dml20v2_rq_dlg_get_dlg_params()
1302 dst->hactive, in dml20v2_rq_dlg_get_dlg_params()
1312 dst->hactive, in dml20v2_rq_dlg_get_dlg_params()
1334 dst->hactive, in dml20v2_rq_dlg_get_dlg_params()
1344 dst->hactive, in dml20v2_rq_dlg_get_dlg_params()
Ddisplay_rq_dlg_calc_20.c123 unsigned int hactive, in get_refcyc_per_delivery() argument
134 * dml_min((double) recout_width, (double) hactive / 2.0) in get_refcyc_per_delivery()
1226 dst->hactive, in dml20_rq_dlg_get_dlg_params()
1237 dst->hactive, in dml20_rq_dlg_get_dlg_params()
1262 dst->hactive, in dml20_rq_dlg_get_dlg_params()
1273 dst->hactive, in dml20_rq_dlg_get_dlg_params()
1301 dst->hactive, in dml20_rq_dlg_get_dlg_params()
1311 dst->hactive, in dml20_rq_dlg_get_dlg_params()
1333 dst->hactive, in dml20_rq_dlg_get_dlg_params()
1343 dst->hactive, in dml20_rq_dlg_get_dlg_params()
/drivers/media/pci/tw68/
Dtw68-video.c255 int hactive, hdelay, hscale; in tw68_set_scale() local
279 hactive = norm->h_stop - norm->h_start + 1; in tw68_set_scale()
281 hscale = (hactive * 256) / (width); in tw68_set_scale()
294 hactive, hdelay, hscale, vactive, vdelay, vscale); in tw68_set_scale()
299 ((hactive & 0x300) >> 8); in tw68_set_scale()
301 __func__, comb, vdelay, vactive, hdelay, hactive); in tw68_set_scale()
306 tw_writeb(TW68_HACTIVE_LO, hactive & 0xff); in tw68_set_scale()
/drivers/media/pci/cx18/
Dcx18-av-core.c285 int hblank, hactive, burst, vblank, vactive, sc; in cx18_av_std_setup() local
348 hactive = 720; in cx18_av_std_setup()
407 hactive = 720; in cx18_av_std_setup()
470 hblank, hactive, vblank, vactive, vblank656, in cx18_av_std_setup()
478 (((hblank >> 8) & 0x3) | (hactive << 4)) & 0xff); in cx18_av_std_setup()
479 cx18_av_write(cx, 0x472, hactive >> 4); in cx18_av_std_setup()
/drivers/gpu/drm/i915/display/
Dvlv_dsi.c1110 u16 hactive, hfp, hsync, hbp, vfp, vsync, vbp; in bxt_dsi_get_pipe_config() local
1148 hactive = adjusted_mode->crtc_hdisplay; in bxt_dsi_get_pipe_config()
1177 adjusted_mode->crtc_htotal = hactive + hfp + hsync + hbp; in bxt_dsi_get_pipe_config()
1307 u16 hactive, hfp, hsync, hbp, vfp, vsync, vbp; in set_dsi_timings() local
1309 hactive = adjusted_mode->crtc_hdisplay; in set_dsi_timings()
1315 hactive /= 2; in set_dsi_timings()
1317 hactive += intel_dsi->pixel_overlap; in set_dsi_timings()
1328 hactive = txbyteclkhs(hactive, bpp, lane_count, in set_dsi_timings()
1352 hactive); in set_dsi_timings()
/drivers/video/fbdev/omap2/omapfb/dss/
Ddisplay.c265 ovt->x_res = vm->hactive; in videomode_to_omap_video_timings()
298 vm->hactive = ovt->x_res; in omap_video_timings_to_videomode()

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