Searched refs:height_in_mb (Results 1 – 2 of 2) sorted by relevance
575 unsigned height_in_mb = ALIGN(height / 16, 2); in amdgpu_uvd_cs_msg_decode() local576 unsigned fs_in_mb = width_in_mb * height_in_mb; in amdgpu_uvd_cs_msg_decode()621 min_dpb_size += width_in_mb * height_in_mb * num_dpb_buffer * 192; in amdgpu_uvd_cs_msg_decode()624 min_dpb_size += width_in_mb * height_in_mb * 32; in amdgpu_uvd_cs_msg_decode()633 min_dpb_size += width_in_mb * height_in_mb * 128; in amdgpu_uvd_cs_msg_decode()642 tmp = max(width_in_mb, height_in_mb); in amdgpu_uvd_cs_msg_decode()658 min_dpb_size += width_in_mb * height_in_mb * 64; in amdgpu_uvd_cs_msg_decode()661 min_dpb_size += ALIGN(width_in_mb * height_in_mb * 32, 64); in amdgpu_uvd_cs_msg_decode()701 width_in_mb * height_in_mb * num_dpb_buffer * 192; in amdgpu_uvd_cs_msg_decode()704 min_dpb_size += width_in_mb * height_in_mb * 32; in amdgpu_uvd_cs_msg_decode()[all …]
365 unsigned height_in_mb = ALIGN(height / 16, 2); in radeon_uvd_cs_msg_decode() local380 min_dpb_size += width_in_mb * height_in_mb * 17 * 192; in radeon_uvd_cs_msg_decode()383 min_dpb_size += width_in_mb * height_in_mb * 32; in radeon_uvd_cs_msg_decode()392 min_dpb_size += width_in_mb * height_in_mb * 128; in radeon_uvd_cs_msg_decode()401 tmp = max(width_in_mb, height_in_mb); in radeon_uvd_cs_msg_decode()417 min_dpb_size += width_in_mb * height_in_mb * 64; in radeon_uvd_cs_msg_decode()420 min_dpb_size += ALIGN(width_in_mb * height_in_mb * 32, 64); in radeon_uvd_cs_msg_decode()