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Searched refs:irq_set_type (Results 1 – 25 of 182) sorted by relevance

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/drivers/gpio/
Dgpio-mpc8xxx.c251 .irq_set_type = mpc8xxx_irq_set_type,
271 int (*irq_set_type)(struct irq_data *, unsigned int); member
276 .irq_set_type = mpc512x_irq_set_type,
281 .irq_set_type = mpc512x_irq_set_type,
289 .irq_set_type = mpc8xxx_irq_set_type,
360 if (devtype->irq_set_type) in mpc8xxx_probe()
361 mpc8xxx_irq_chip.irq_set_type = devtype->irq_set_type; in mpc8xxx_probe()
Dgpio-mxs.c205 ct->chip.irq_set_type = mxs_gpio_set_irq_type; in mxs_gpio_init_gc()
217 ct->chip.irq_set_type = mxs_gpio_set_irq_type; in mxs_gpio_init_gc()
Dgpio-visconti.c175 irq_chip->irq_set_type = visconti_gpio_irq_set_type; in visconti_gpio_probe()
/drivers/irqchip/
Dirq-partition-percpu.c89 if (chip->irq_set_type) in partition_irq_set_type()
90 return chip->irq_set_type(data, type); in partition_irq_set_type()
107 .irq_set_type = partition_irq_set_type,
Dirq-gic-v3-mbi.c37 .irq_set_type = irq_chip_set_type_parent,
72 return d->chip->irq_set_type(d, IRQ_TYPE_EDGE_RISING); in mbi_irq_gic_domain_alloc()
217 .irq_set_type = irq_chip_set_type_parent,
Dirq-tb10x.c150 gc->chip_types[0].chip.irq_set_type = tb10x_irq_set_type; in of_tb10x_init_irq()
158 gc->chip_types[1].chip.irq_set_type = tb10x_irq_set_type; in of_tb10x_init_irq()
Dirq-ls1x.c166 ct[0].chip.irq_set_type = ls_intc_set_type; in ls1x_intc_of_init()
175 ct[1].chip.irq_set_type = ls_intc_set_type; in ls1x_intc_of_init()
Dirq-sunxi-nmi.c189 gc->chip_types[0].chip.irq_set_type = sunxi_sc_nmi_set_type; in sunxi_sc_nmi_irq_init()
200 gc->chip_types[1].chip.irq_set_type = sunxi_sc_nmi_set_type; in sunxi_sc_nmi_irq_init()
Dirq-mtk-sysirq.c55 ret = data->chip->irq_set_type(data, type); in mtk_sysirq_set_type()
65 .irq_set_type = mtk_sysirq_set_type,
Dirq-mtk-cirq.c87 ret = data->chip->irq_set_type(data, type); in mtk_cirq_set_type()
96 .irq_set_type = mtk_cirq_set_type,
Dirq-mvebu-gicp.c76 .irq_set_type = irq_chip_set_type_parent,
154 .irq_set_type = irq_chip_set_type_parent,
Dirq-mvebu-sei.c135 .irq_set_type = mvebu_sei_ap_set_type,
163 .irq_set_type = mvebu_sei_cp_set_type,
313 .irq_set_type = irq_chip_set_type_parent,
Dirq-sun6i-r.c181 .irq_set_type = sun6i_r_intc_nmi_set_type,
193 .irq_set_type = irq_chip_set_type_parent,
Dirq-rda-intc.c65 .irq_set_type = rda_intc_set_type,
Dirq-mvebu-icu.c137 .irq_set_type = irq_chip_set_type_parent,
146 .irq_set_type = irq_chip_set_type_parent,
Dirq-wpcm450-aic.c116 .irq_set_type = wpcm450_aic_set_type,
Dirq-imgpdc.c421 gc->chip_types[0].chip.irq_set_type = syswake_irq_set_type; in pdc_intc_probe()
434 gc->chip_types[1].chip.irq_set_type = syswake_irq_set_type; in pdc_intc_probe()
Dirq-ls-extirq.c64 .irq_set_type = ls_extirq_set_type,
Dirq-ftintc010.c123 .irq_set_type = ft010_irq_set_type,
Dirq-mvebu-odmi.c117 d->chip->irq_set_type(d, IRQ_TYPE_EDGE_RISING); in odmi_irq_domain_alloc()
/drivers/pinctrl/actions/
Dpinctrl-owl.c663 static void irq_set_type(struct owl_pinctrl *pctrl, int gpio, unsigned int type) in irq_set_type() function
794 irq_set_type(pctrl, gpio, IRQ_TYPE_EDGE_FALLING); in owl_gpio_irq_ack()
796 irq_set_type(pctrl, gpio, IRQ_TYPE_EDGE_RISING); in owl_gpio_irq_ack()
823 irq_set_type(pctrl, data->hwirq, type); in owl_gpio_irq_set_type()
883 pctrl->irq_chip.irq_set_type = owl_gpio_irq_set_type; in owl_gpio_init()
/drivers/pinctrl/samsung/
Dpinctrl-exynos.c216 .irq_set_type = exynos_irq_set_type,
408 .irq_set_type = exynos_irq_set_type,
428 .irq_set_type = exynos_irq_set_type,
447 .irq_set_type = exynos_irq_set_type,
Dpinctrl-s3c24xx.c230 .irq_set_type = s3c24xx_eint_type,
283 .irq_set_type = s3c24xx_eint_type,
343 .irq_set_type = s3c24xx_eint_type,
/drivers/soc/ti/
Dti_sci_inta_msi.c41 chip->irq_set_type = irq_chip_set_type_parent; in ti_sci_inta_msi_update_chip_ops()
/drivers/sh/intc/
Dchip.c206 .irq_set_type = intc_set_type,

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