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Searched refs:managed (Results 1 – 25 of 56) sorted by relevance

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/drivers/gpu/drm/
Ddrm_managed.c68 list_for_each_entry_safe(dr, tmp, &dev->managed.resources, node.entry) { in drm_managed_release()
120 spin_lock_irqsave(&dev->managed.lock, flags); in add_dr()
121 list_add(&dr->node.entry, &dev->managed.resources); in add_dr()
122 spin_unlock_irqrestore(&dev->managed.lock, flags); in add_dr()
130 WARN_ON(dev->managed.final_kfree); in drmm_add_final_kfree()
133 dev->managed.final_kfree = container; in drmm_add_final_kfree()
249 spin_lock_irqsave(&dev->managed.lock, flags); in drmm_kfree()
250 list_for_each_entry(dr, &dev->managed.resources, node.entry) { in drmm_kfree()
257 spin_unlock_irqrestore(&dev->managed.lock, flags); in drmm_kfree()
Ddrm_drv.c599 INIT_LIST_HEAD(&dev->managed.resources); in drm_dev_init()
600 spin_lock_init(&dev->managed.lock); in drm_dev_init()
752 kfree(dev->managed.final_kfree); in drm_dev_release()
872 WARN_ON(!dev->managed.final_kfree); in drm_dev_register()
/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/
Dvmmgm200.c144 struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gm200_vmm_new_() argument
168 return nvkm_vmm_new_(func, mmu, 0, managed, addr, size, key, name, pvmm); in gm200_vmm_new_()
172 gm200_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gm200_vmm_new() argument
176 return gm200_vmm_new_(&gm200_vmm_16, &gm200_vmm_17, mmu, managed, addr, in gm200_vmm_new()
181 gm200_vmm_new_fixed(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gm200_vmm_new_fixed() argument
185 return gf100_vmm_new_(&gm200_vmm_16, &gm200_vmm_17, mmu, managed, addr, in gm200_vmm_new_fixed()
Dvmmgm20b.c57 gm20b_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gm20b_vmm_new() argument
61 return gm200_vmm_new_(&gm20b_vmm_16, &gm20b_vmm_17, mmu, managed, addr, in gm20b_vmm_new()
66 gm20b_vmm_new_fixed(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gm20b_vmm_new_fixed() argument
70 return gf100_vmm_new_(&gm20b_vmm_16, &gm20b_vmm_17, mmu, managed, addr, in gm20b_vmm_new_fixed()
Dvmmnv04.c103 u32 pd_header, bool managed, u64 addr, u64 size, in nv04_vmm_new_() argument
112 ret = nvkm_vmm_new_(func, mmu, pd_header, managed, addr, size, in nv04_vmm_new_()
121 nv04_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in nv04_vmm_new() argument
129 ret = nv04_vmm_new_(&nv04_vmm, mmu, 8, managed, addr, size, in nv04_vmm_new()
Dvmmmcp77.c39 mcp77_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in mcp77_vmm_new() argument
43 return nv04_vmm_new_(&mcp77_vmm, mmu, 0, managed, addr, size, in mcp77_vmm_new()
Dvmmgp10b.c45 gp10b_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gp10b_vmm_new() argument
49 return gp100_vmm_new_(&gp10b_vmm, mmu, managed, addr, size, in gp10b_vmm_new()
Dvmmgk20a.c67 gk20a_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gk20a_vmm_new() argument
71 return gf100_vmm_new_(&gk20a_vmm_16, &gk20a_vmm_17, mmu, managed, addr, in gk20a_vmm_new()
Dvmmtu102.c71 tu102_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in tu102_vmm_new() argument
75 return gp100_vmm_new_(&tu102_vmm, mmu, managed, addr, size, in tu102_vmm_new()
Dvmmgv100.c83 gv100_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gv100_vmm_new() argument
87 return gp100_vmm_new_(&gv100_vmm, mmu, managed, addr, size, in gv100_vmm_new()
Dvmmgk104.c98 gk104_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gk104_vmm_new() argument
102 return gf100_vmm_new_(&gk104_vmm_16, &gk104_vmm_17, mmu, managed, addr, in gk104_vmm_new()
Dvmmgf100.c402 struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gf100_vmm_new_() argument
407 case 16: return nv04_vmm_new_(func_16, mmu, 0, managed, addr, size, in gf100_vmm_new_()
409 case 17: return nv04_vmm_new_(func_17, mmu, 0, managed, addr, size, in gf100_vmm_new_()
418 gf100_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gf100_vmm_new() argument
422 return gf100_vmm_new_(&gf100_vmm_16, &gf100_vmm_17, mmu, managed, addr, in gf100_vmm_new()
Dvmmnv41.c106 nv41_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in nv41_vmm_new() argument
110 return nv04_vmm_new_(&nv41_vmm, mmu, 0, managed, addr, size, in nv41_vmm_new()
Duvmm.c369 bool managed; in nvkm_uvmm_new() local
372 managed = args->v0.managed != 0; in nvkm_uvmm_new()
384 ret = mmu->func->vmm.ctor(mmu, managed, addr, size, argv, argc, in nvkm_uvmm_new()
Dvmmnv44.c208 nv44_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in nv44_vmm_new() argument
216 ret = nv04_vmm_new_(&nv44_vmm, mmu, 0, managed, addr, size, in nv44_vmm_new()
Dvmmgp100.c599 struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gp100_vmm_new_() argument
618 ret = nvkm_vmm_new_(func, mmu, 0, managed, addr, size, key, name, pvmm); in gp100_vmm_new_()
627 gp100_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size, in gp100_vmm_new() argument
631 return gp100_vmm_new_(&gp100_vmm, mmu, managed, addr, size, in gp100_vmm_new()
Dpriv.h31 int (*ctor)(struct nvkm_mmu *, bool managed, u64 addr, u64 size,
/drivers/net/mdio/
Dof_mdio.c360 const char *managed; in of_phy_is_fixed_link() local
369 err = of_property_read_string(np, "managed", &managed); in of_phy_is_fixed_link()
370 if (err == 0 && strcmp(managed, "auto") != 0) in of_phy_is_fixed_link()
387 const char *managed; in of_phy_register_fixed_link() local
389 if (of_property_read_string(np, "managed", &managed) == 0 && in of_phy_register_fixed_link()
390 strcmp(managed, "in-band-status") == 0) { in of_phy_register_fixed_link()
/drivers/net/dsa/
DKconfig91 tristate "SMSC/Microchip LAN9303 3-ports 10/100 ethernet switch in I2C managed mode"
98 for I2C managed mode.
101 tristate "SMSC/Microchip LAN9303 3-ports 10/100 ethernet switch in MDIO managed mode"
106 for MDIO managed mode.
123 and VSC7398 SparX integrated ethernet switches in SPI managed mode.
/drivers/gpu/drm/nouveau/nvif/
Dvmm.c115 nvif_vmm_ctor(struct nvif_mmu *mmu, const char *name, s32 oclass, bool managed, in nvif_vmm_ctor() argument
128 args->managed = managed; in nvif_vmm_ctor()
/drivers/net/dsa/b53/
DKconfig3 tristate "Broadcom BCM53xx managed switch support"
9 This driver adds support for Broadcom managed switch chips. It supports
/drivers/cxl/
DKconfig55 Enable support for host managed device memory (HDM) resources
62 Memory regions to be managed by LIBNVDIMM.
73 managed via a bridge driver from CXL to the LIBNVDIMM system
/drivers/gpu/drm/nouveau/include/nvif/
Dvmm.h33 int nvif_vmm_ctor(struct nvif_mmu *, const char *name, s32 oclass, bool managed,
Dif000c.h6 __u8 managed; member
/drivers/gpu/drm/amd/amdkfd/
DKconfig23 Enable this to use unified memory and managed memory in HIP. This

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