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Searched refs:margins (Results 1 – 14 of 14) sorted by relevance

/drivers/gpu/drm/selftests/
Dtest-drm_cmdline_parser.c34 FAIL_ON(mode.margins); in drm_cmdline_test_force_e_only()
54 FAIL_ON(mode.margins); in drm_cmdline_test_force_D_only_not_digital()
78 FAIL_ON(mode.margins); in drm_cmdline_test_force_D_only_hdmi()
102 FAIL_ON(mode.margins); in drm_cmdline_test_force_D_only_dvi()
122 FAIL_ON(mode.margins); in drm_cmdline_test_force_d_only()
168 FAIL_ON(mode.margins); in drm_cmdline_test_res()
236 FAIL_ON(mode.margins); in drm_cmdline_test_res_vesa()
260 FAIL_ON(mode.margins); in drm_cmdline_test_res_vesa_rblank()
284 FAIL_ON(mode.margins); in drm_cmdline_test_res_rblank()
309 FAIL_ON(mode.margins); in drm_cmdline_test_res_bpp()
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/drivers/video/fbdev/kyro/
DSTG4000VTG.c63 u32 margins = 0; in SetupVTG() local
81 margins = 8; in SetupVTG()
88 (pTiming->HST + (pTiming->HBP - margins) + xRes + in SetupVTG()
89 (pTiming->HFP - margins))) >> 1; in SetupVTG()
99 pTiming->HST + (pTiming->HBP - margins) + HLeftBorder; in SetupVTG()
102 pTiming->HST + (pTiming->HBP - margins) + HLeftBorder + in SetupVTG()
111 pTiming->VST + (pTiming->VBP - margins) + VTopBorder; in SetupVTG()
114 pTiming->VST + (pTiming->VBP - margins) + VTopBorder + in SetupVTG()
/drivers/gpu/drm/i915/display/
Dintel_tv.c876 } margins; member
1177 conn_state->tv.margins.top - in intel_tv_vert_scaling()
1178 conn_state->tv.margins.bottom != in intel_tv_vert_scaling()
1227 top = conn_state->tv.margins.top; in intel_tv_compute_config()
1228 bottom = conn_state->tv.margins.bottom; in intel_tv_compute_config()
1236 tv_conn_state->margins.top = top; in intel_tv_compute_config()
1237 tv_conn_state->margins.bottom = bottom; in intel_tv_compute_config()
1247 tv_conn_state->margins.top = conn_state->tv.margins.top; in intel_tv_compute_config()
1248 tv_conn_state->margins.bottom = conn_state->tv.margins.bottom; in intel_tv_compute_config()
1322 conn_state->tv.margins.left, in intel_tv_compute_config()
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/drivers/gpu/drm/vc4/
Dvc4_crtc.c643 *left = vc4_state->margins.left; in vc4_crtc_get_margins()
644 *right = vc4_state->margins.right; in vc4_crtc_get_margins()
645 *top = vc4_state->margins.top; in vc4_crtc_get_margins()
646 *bottom = vc4_state->margins.bottom; in vc4_crtc_get_margins()
657 *left = conn_state->tv.margins.left; in vc4_crtc_get_margins()
658 *right = conn_state->tv.margins.right; in vc4_crtc_get_margins()
659 *top = conn_state->tv.margins.top; in vc4_crtc_get_margins()
660 *bottom = conn_state->tv.margins.bottom; in vc4_crtc_get_margins()
684 vc4_state->margins.left = conn_state->tv.margins.left; in vc4_crtc_atomic_check()
685 vc4_state->margins.right = conn_state->tv.margins.right; in vc4_crtc_atomic_check()
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Dvc4_drv.h559 } margins; member
/drivers/gpu/drm/gud/
Dgud_connector.c301 if (old_state->tv.margins.left != new_state->tv.margins.left || in gud_connector_atomic_check()
302 old_state->tv.margins.right != new_state->tv.margins.right || in gud_connector_atomic_check()
303 old_state->tv.margins.top != new_state->tv.margins.top || in gud_connector_atomic_check()
304 old_state->tv.margins.bottom != new_state->tv.margins.bottom || in gud_connector_atomic_check()
448 return &state->margins.left; in gud_connector_tv_state_val()
450 return &state->margins.right; in gud_connector_tv_state_val()
452 return &state->margins.top; in gud_connector_tv_state_val()
454 return &state->margins.bottom; in gud_connector_tv_state_val()
/drivers/gpu/drm/
Ddrm_atomic_state_helper.c450 state->tv.margins.left = cmdline->tv_margins.left; in drm_atomic_helper_connector_tv_reset()
451 state->tv.margins.right = cmdline->tv_margins.right; in drm_atomic_helper_connector_tv_reset()
452 state->tv.margins.top = cmdline->tv_margins.top; in drm_atomic_helper_connector_tv_reset()
453 state->tv.margins.bottom = cmdline->tv_margins.bottom; in drm_atomic_helper_connector_tv_reset()
Ddrm_modes.c142 bool reduced, bool interlaced, bool margins) in drm_cvt_mode() argument
186 if (margins) { in drm_cvt_mode()
201 if (margins) in drm_cvt_mode()
367 int vrefresh, bool interlaced, int margins, in drm_gtf_mode_complex() argument
431 if (margins) in drm_gtf_mode_complex()
473 if (margins) in drm_gtf_mode_complex()
572 bool interlaced, int margins) in drm_gtf_mode() argument
575 interlaced, margins, in drm_gtf_mode()
1442 mode->margins = true; in drm_mode_parse_cmdline_extra()
1871 cmd->margins); in drm_mode_create_from_cmdline_mode()
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Ddrm_atomic_uapi.c728 state->tv.margins.left = val; in drm_atomic_connector_set_property()
730 state->tv.margins.right = val; in drm_atomic_connector_set_property()
732 state->tv.margins.top = val; in drm_atomic_connector_set_property()
734 state->tv.margins.bottom = val; in drm_atomic_connector_set_property()
834 *val = state->tv.margins.left; in drm_atomic_connector_get_property()
836 *val = state->tv.margins.right; in drm_atomic_connector_get_property()
838 *val = state->tv.margins.top; in drm_atomic_connector_get_property()
840 *val = state->tv.margins.bottom; in drm_atomic_connector_get_property()
Ddrm_edid.c5841 frame->right_bar = conn_state->tv.margins.right; in drm_hdmi_avi_infoframe_bars()
5842 frame->left_bar = conn_state->tv.margins.left; in drm_hdmi_avi_infoframe_bars()
5843 frame->top_bar = conn_state->tv.margins.top; in drm_hdmi_avi_infoframe_bars()
5844 frame->bottom_bar = conn_state->tv.margins.bottom; in drm_hdmi_avi_infoframe_bars()
Ddrm_client_modeset.c174 if (cmdline_mode->rb || cmdline_mode->margins) in drm_connector_pick_cmdline_mode()
Ddrm_connector.c173 mode->margins ? " with margins" : "", in drm_connector_get_cmdline_mode()
/drivers/video/fbdev/core/
Dmodedb.c652 int margins = 0; in fb_find_mode() local
700 margins = 1; in fb_find_mode()
730 (margins) ? " with margins" : "", in fb_find_mode()
743 ret = fb_find_mode_cvt(&cvt_mode, margins, rb); in fb_find_mode()
Dfbcvt.c294 int fb_find_mode_cvt(struct fb_videomode *mode, int margins, int rb) in fb_find_mode_cvt() argument
300 if (margins) in fb_find_mode_cvt()