Searched refs:max_lane_count (Results 1 – 12 of 12) sorted by relevance
| /drivers/gpu/drm/bridge/ |
| D | parade-ps8622.c | 54 u32 max_lane_count; member
180 err = ps8622_set(cl, 0x01, 0x02, 0x80 | ps8622->max_lane_count); in ps8622_send_config()
497 ps8622->max_lane_count = id->driver_data; in ps8622_probe()
501 ps8622->lane_count = ps8622->max_lane_count; in ps8622_probe()
502 } else if (ps8622->lane_count > ps8622->max_lane_count) { in ps8622_probe()
505 ps8622->lane_count = ps8622->max_lane_count; in ps8622_probe()
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| /drivers/gpu/drm/gma500/ |
| D | cdv_intel_dp.c | 328 int max_lane_count = 4; in cdv_intel_dp_max_lane_count() local
331 max_lane_count = intel_dp->dpcd[DP_MAX_LANE_COUNT] & 0x1f; in cdv_intel_dp_max_lane_count()
332 switch (max_lane_count) { in cdv_intel_dp_max_lane_count()
336 max_lane_count = 4; in cdv_intel_dp_max_lane_count()
339 return max_lane_count; in cdv_intel_dp_max_lane_count()
903 int max_lane_count = cdv_intel_dp_max_lane_count(intel_encoder); in cdv_intel_dp_mode_fixup() local
915 for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) { in cdv_intel_dp_mode_fixup()
933 intel_dp->lane_count = max_lane_count; in cdv_intel_dp_mode_fixup()
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| /drivers/gpu/drm/i915/display/ |
| D | intel_dp.h | 30 int min_lane_count, max_lane_count; member
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| D | intel_dp_mst.c | 63 crtc_state->lane_count = limits->max_lane_count; in intel_dp_mst_compute_link_config()
138 limits.max_lane_count = intel_dp_max_lane_count(intel_dp); in intel_dp_mst_compute_config()
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| D | intel_dp.c | 1057 limits->min_lane_count = limits->max_lane_count = in intel_dp_adjust_compliance_config()
1081 lane_count <= limits->max_lane_count; in intel_dp_compute_link_config_wide()
1225 pipe_config->lane_count = limits->max_lane_count; in intel_dp_dsc_compute_config()
1342 limits.max_lane_count = intel_dp_max_lane_count(intel_dp); in intel_dp_compute_link_config()
1356 limits.min_lane_count = limits.max_lane_count; in intel_dp_compute_link_config()
1364 limits.max_lane_count, in intel_dp_compute_link_config()
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| /drivers/gpu/drm/bridge/analogix/ |
| D | analogix_dp_core.h | 143 enum link_lane_count_type max_lane_count; member
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| D | analogix_dp_core.c | 792 return analogix_dp_full_link_train(dp, dp->video_info.max_lane_count, in analogix_dp_train_link()
1648 video_info->max_lane_count = 0x04; in analogix_dp_dt_parse_pdata()
1658 &video_info->max_lane_count); in analogix_dp_dt_parse_pdata()
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| /drivers/gpu/drm/amd/display/dc/ |
| D | dc_dp_types.h | 150 union max_lane_count { union
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| D | dc_types.h | 394 uint8_t max_lane_count; member
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| D | dc.h | 1117 union max_lane_count max_ln_count;
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| /drivers/gpu/drm/amd/display/dc/core/ |
| D | dc_link_dp.c | 2064 if (link->dpcd_caps.lttpr_caps.max_lane_count < max_link_cap.lane_count) in get_max_link_cap()
2065 max_link_cap.lane_count = link->dpcd_caps.lttpr_caps.max_lane_count; in get_max_link_cap()
3694 link->dpcd_caps.lttpr_caps.max_lane_count = in dp_retrieve_lttpr_cap()
3716 link->dpcd_caps.lttpr_caps.max_lane_count > 0 && in dp_retrieve_lttpr_cap()
3717 link->dpcd_caps.lttpr_caps.max_lane_count <= 4 && in dp_retrieve_lttpr_cap()
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| /drivers/gpu/drm/ |
| D | drm_dp_mst_topology.c | 3733 lane_count = min_t(int, mgr->dpcd[2] & DP_MAX_LANE_COUNT_MASK, mgr->max_lane_count); in drm_dp_mst_topology_mgr_set_mst()
5484 int max_lane_count, int max_link_rate, in drm_dp_mst_topology_mgr_init() argument
5520 mgr->max_lane_count = max_lane_count; in drm_dp_mst_topology_mgr_init()
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