| /drivers/gpu/drm/nouveau/nvkm/subdev/bios/ |
| D | pll.c | 278 info->vco1.max_n = 0xff; in nvbios_pll_parse()
292 info->vco2.max_n = 0x1f; in nvbios_pll_parse()
295 info->vco2.max_n = 0x28; in nvbios_pll_parse()
312 info->vco1.max_n = nvbios_rd08(bios, data + 21); in nvbios_pll_parse()
316 info->vco2.max_n = nvbios_rd08(bios, data + 25); in nvbios_pll_parse()
341 info->vco1.max_n = nvbios_rd08(bios, data + 17); in nvbios_pll_parse()
345 info->vco2.max_n = nvbios_rd08(bios, data + 21); in nvbios_pll_parse()
363 info->vco1.max_n = nvbios_rd08(bios, data + 11); in nvbios_pll_parse()
377 info->vco1.max_n = nvbios_rd08(bios, data + 16); in nvbios_pll_parse()
416 info->vco1.max_n = 0xff; in nvbios_pll_parse()
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| /drivers/clk/sunxi-ng/ |
| D | ccu_nk.c | 14 unsigned long n, min_n, max_n; member
26 for (_n = nk->min_n; _n <= nk->max_n; _n++) { in ccu_nk_find_best()
103 _nk.max_n = nk->n.max ?: 1 << nk->n.width; in ccu_nk_round_rate()
128 _nk.max_n = nk->n.max ?: 1 << nk->n.width; in ccu_nk_set_rate()
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| D | ccu_nkm.c | 14 unsigned long n, min_n, max_n; member
27 for (_n = nkm->min_n; _n <= nkm->max_n; _n++) { in ccu_nkm_find_best()
116 _nkm.max_n = nkm->n.max ?: 1 << nkm->n.width; in ccu_nkm_round_rate()
156 _nkm.max_n = nkm->n.max ?: 1 << nkm->n.width; in ccu_nkm_set_rate()
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| D | ccu_nm.c | 15 unsigned long n, min_n, max_n; member
37 for (_n = nm->min_n; _n <= nm->max_n; _n++) { in ccu_nm_find_best()
156 _nm.max_n = nm->n.max ?: 1 << nm->n.width; in ccu_nm_round_rate()
200 _nm.max_n = nm->n.max ?: 1 << nm->n.width; in ccu_nm_set_rate()
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| D | ccu_nkmp.c | 14 unsigned long n, min_n, max_n; member
40 for (_n = nkmp->min_n; _n <= nkmp->max_n; _n++) { in ccu_nkmp_find_best()
145 _nkmp.max_n = nkmp->n.max ?: 1 << nkmp->n.width; in ccu_nkmp_round_rate()
176 _nkmp.max_n = nkmp->n.max ?: 1 << nkmp->n.width; in ccu_nkmp_set_rate()
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| /drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| D | pllnv04.c | 43 int minN = info->vco1.min_n, maxN = info->vco1.max_n; in getMNP_single()
145 int minN1 = info->vco1.min_n, maxN1 = info->vco1.max_n; in getMNP_double()
147 int minN2 = info->vco2.min_n, maxN2 = info->vco2.max_n; in getMNP_double()
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| D | gk20a.c | 60 .min_n = 8, .max_n = 255,
155 if (n > clk->params->max_n) in gk20a_pllg_calc_mnp()
163 if (n > clk->params->max_n) in gk20a_pllg_calc_mnp()
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| D | pllgt215.c | 64 if (N > info->vco1.max_n) in gt215_pll_calc()
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| D | gk20a.h | 106 u32 min_n, max_n; member
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| D | gm20b.c | 155 .min_n = 8, .max_n = 255,
247 if (n >> DFS_DET_RANGE > p->max_n) { in gm20b_dvfs_calc_ndiv()
249 n = p->max_n << DFS_DET_RANGE; in gm20b_dvfs_calc_ndiv()
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| /drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ |
| D | pll.h | 71 u8 max_n; member
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| /drivers/phy/freescale/ |
| D | phy-fsl-imx8-mipi-dphy.c | 127 static void get_best_ratio(u32 *pnum, u32 *pdenom, u32 max_n, u32 max_d) in get_best_ratio() argument
142 if ((n[i] > max_n) || (d[i] > max_d)) { in get_best_ratio()
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| /drivers/gpu/drm/i915/display/ |
| D | intel_dpll.c | 550 int max_n; in g4x_find_best_dpll() local
559 max_n = limit->n.max; in g4x_find_best_dpll()
561 for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) { in g4x_find_best_dpll()
581 max_n = clock.n; in g4x_find_best_dpll()
647 int max_n = min(limit->n.max, refclk / 19200); in vlv_find_best_dpll() local
655 for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) { in vlv_find_best_dpll()
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| /drivers/staging/rts5208/ |
| D | rtsx_card.c | 625 u8 n = (u8)(clk - 2), min_n, max_n; in switch_ssc_clock() local
633 max_n = 120; in switch_ssc_clock()
639 if ((clk <= 2) || (n > max_n)) in switch_ssc_clock()
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| /drivers/gpu/drm/tegra/ |
| D | hdmi.c | 369 const unsigned int max_n = afreq / 300; in tegra_hdmi_get_audio_config() local
378 for (n = min_n; n <= max_n; n++) { in tegra_hdmi_get_audio_config()
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| /drivers/video/fbdev/intelfb/ |
| D | intelfbhw.c | 43 int min_m2, max_m2, min_n, max_n; member
997 } while ((n <= pll->max_n) && (f_out >= clock)); in calc_pll_params()
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| /drivers/gpu/drm/nouveau/dispnv04/ |
| D | hw.c | 273 pv.N1 >= pll_lim.vco1.min_n && pv.N1 <= pll_lim.vco1.max_n && in nouveau_hw_fix_bad_vpll()
|