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Searched refs:mcfg (Results 1 – 4 of 4) sorted by relevance

/drivers/net/can/m_can/
Dm_can.c336 u32 addr_offset = cdev->mcfg[MRAM_RXF0].off + fgi * RXF0_ELEMENT_SIZE + in m_can_fifo_read()
349 u32 addr_offset = cdev->mcfg[MRAM_TXB].off + fpi * TXB_ELEMENT_SIZE + in m_can_fifo_write()
367 u32 addr_offset = cdev->mcfg[MRAM_TXE].off + fgi * TXE_ELEMENT_SIZE + in m_can_txe_fifo_read()
1277 cdev->mcfg[MRAM_TXB].off); in m_can_chip_config()
1282 cdev->mcfg[MRAM_TXB].num) | in m_can_chip_config()
1283 cdev->mcfg[MRAM_TXB].off); in m_can_chip_config()
1294 cdev->mcfg[MRAM_TXE].off); in m_can_chip_config()
1299 cdev->mcfg[MRAM_TXE].num) | in m_can_chip_config()
1300 cdev->mcfg[MRAM_TXE].off); in m_can_chip_config()
1305 FIELD_PREP(RXFC_FS_MASK, cdev->mcfg[MRAM_RXF0].num) | in m_can_chip_config()
[all …]
Dm_can.h99 struct mram_cfg mcfg[MRAM_CFG_NUM]; member
/drivers/acpi/
Dpci_mcfg.c272 struct acpi_table_mcfg *mcfg; in pci_mcfg_parse() local
282 mcfg = (struct acpi_table_mcfg *)header; in pci_mcfg_parse()
283 mptr = (struct acpi_mcfg_allocation *) &mcfg[1]; in pci_mcfg_parse()
/drivers/char/
Dhpet.c837 u64 cap, mcfg; in hpet_alloc() local
915 mcfg = readq(&hpet->hpet_config); in hpet_alloc()
916 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) { in hpet_alloc()
918 mcfg |= HPET_ENABLE_CNF_MASK; in hpet_alloc()
919 writeq(mcfg, &hpet->hpet_config); in hpet_alloc()