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Searched refs:mmDPCSTX0_DPCSTX_PLL_UPDATE_DATA (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddpcs_3_0_3_offset.h25 #define mmDPCSTX0_DPCSTX_PLL_UPDATE_DATA … macro
Ddpcs_3_0_0_offset.h18 #define mmDPCSTX0_DPCSTX_PLL_UPDATE_DATA … macro
/drivers/gpu/drm/amd/include/asic_reg/dpcs/
Ddpcs_2_1_0_offset.h38 #define mmDPCSTX0_DPCSTX_PLL_UPDATE_DATA … macro
Ddpcs_2_0_0_offset.h38 #define mmDPCSTX0_DPCSTX_PLL_UPDATE_DATA … macro
/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_11_2_d.h10039 #define mmDPCSTX0_DPCSTX_PLL_UPDATE_DATA 0x48d9 macro