Home
last modified time | relevance | path

Searched refs:mmRDPCSTX4_RDPCSTX_DPALT_CONTROL_REG (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddpcs_3_0_0_offset.h474 #define mmRDPCSTX4_RDPCSTX_DPALT_CONTROL_REG … macro
/drivers/gpu/drm/amd/include/asic_reg/dpcs/
Ddpcs_2_1_0_offset.h546 #define mmRDPCSTX4_RDPCSTX_DPALT_CONTROL_REG … macro
Ddpcs_2_0_0_offset.h536 #define mmRDPCSTX4_RDPCSTX_DPALT_CONTROL_REG … macro