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Searched refs:mpcc_in_use_mask (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_mpc.c108 ASSERT(!(mpc10->mpcc_in_use_mask & 1 << id)); in mpc1_assert_idle_mpcc()
204 ASSERT(!(mpc10->mpcc_in_use_mask & 1 << mpcc_id)); in mpc1_insert_plane()
267 mpc10->mpcc_in_use_mask |= 1 << mpcc_id; in mpc1_insert_plane()
335 mpc10->mpcc_in_use_mask &= ~(1 << mpcc_id); in mpc1_remove_mpcc()
372 mpc10->mpcc_in_use_mask = 0; in mpc1_mpc_init()
434 mpc10->mpcc_in_use_mask |= 1 << mpcc_id; in mpc1_init_mpcc_list_from_hw()
526 mpc10->mpcc_in_use_mask = 0; in dcn10_mpc_construct()
Ddcn10_mpc.h127 int mpcc_in_use_mask; member
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_mpc.c474 ASSERT(!(mpc20->mpcc_in_use_mask & 1 << id)); in mpc2_assert_idle_mpcc()
585 mpc20->mpcc_in_use_mask = 0; in dcn20_mpc_construct()
Ddcn20_mpc.h263 int mpcc_in_use_mask; member
/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_mpc.h779 int mpcc_in_use_mask; member
Ddcn30_mpc.c1455 mpc30->mpcc_in_use_mask = 0; in dcn30_mpc_construct()