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Searched refs:native (Results 1 – 25 of 37) sorted by relevance

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/drivers/rpmsg/
Dqcom_glink_smem.c37 struct qcom_glink_pipe native; member
47 #define to_smem_pipe(p) container_of(p, struct glink_smem_pipe, native)
67 pipe->native.length = len; in glink_smem_rx_avail()
74 return pipe->native.length - tail + head; in glink_smem_rx_avail()
88 if (tail >= pipe->native.length) in glink_smem_rx_peak()
89 tail -= pipe->native.length; in glink_smem_rx_peak()
91 len = min_t(size_t, count, pipe->native.length - tail); in glink_smem_rx_peak()
108 if (tail >= pipe->native.length) in glink_smem_rx_advance()
109 tail -= pipe->native.length; in glink_smem_rx_advance()
125 avail = pipe->native.length - head + tail; in glink_smem_tx_avail()
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Dqcom_glink_rpm.c32 #define to_rpm_pipe(p) container_of(p, struct glink_rpm_pipe, native)
48 struct qcom_glink_pipe native; member
66 return pipe->native.length - tail + head; in glink_rpm_rx_avail()
80 if (tail >= pipe->native.length) in glink_rpm_rx_peak()
81 tail -= pipe->native.length; in glink_rpm_rx_peak()
83 len = min_t(size_t, count, pipe->native.length - tail); in glink_rpm_rx_peak()
104 if (tail >= pipe->native.length) in glink_rpm_rx_advance()
105 tail -= pipe->native.length; in glink_rpm_rx_advance()
120 return pipe->native.length - head + tail; in glink_rpm_tx_avail()
131 len = min_t(size_t, count, pipe->native.length - head); in glink_rpm_tx_write_one()
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/drivers/misc/cxl/
Dnative.c227 afu->native->spa_order = -1; in cxl_alloc_spa()
229 afu->native->spa_order++; in cxl_alloc_spa()
230 spa_size = (1 << afu->native->spa_order) * PAGE_SIZE; in cxl_alloc_spa()
234 afu->native->spa_max_procs, afu->native->spa_size); in cxl_alloc_spa()
236 afu->num_procs = afu->native->spa_max_procs; in cxl_alloc_spa()
240 afu->native->spa_size = spa_size; in cxl_alloc_spa()
241 afu->native->spa_max_procs = spa_max_procs(afu->native->spa_size); in cxl_alloc_spa()
242 } while (afu->native->spa_max_procs < afu->num_procs); in cxl_alloc_spa()
244 if (!(afu->native->spa = (struct cxl_process_element *) in cxl_alloc_spa()
245 __get_free_pages(GFP_KERNEL | __GFP_ZERO, afu->native->spa_order))) { in cxl_alloc_spa()
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Dpci.c89 #define AFUD_READ(afu, off) in_be64(afu->native->afu_desc_mmio + off)
90 #define AFUD_READ_LE(afu, off) in_le64(afu->native->afu_desc_mmio + off)
545 adapter->native->no_data_cache = true; in init_implementation_adapter_regs_psl9()
628 if (adapter->native->sl_ops->write_timebase_ctrl) in cxl_setup_psl_timebase()
629 adapter->native->sl_ops->write_timebase_ctrl(adapter); in cxl_setup_psl_timebase()
791 afu->psn_phys = p2_base(dev) + (adapter->native->ps_off + (afu->slice * adapter->ps_size)); in pci_map_slice_regs()
792 …afu_desc = p2_base(dev) + adapter->native->afu_desc_off + (afu->slice * adapter->native->afu_desc_… in pci_map_slice_regs()
794 if (!(afu->native->p1n_mmio = ioremap(p1n_base, p1n_size))) in pci_map_slice_regs()
799 if (!(afu->native->afu_desc_mmio = ioremap(afu_desc, adapter->native->afu_desc_size))) in pci_map_slice_regs()
807 iounmap(afu->native->p1n_mmio); in pci_map_slice_regs()
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Ddebugfs.c71 if (adapter->native->sl_ops->debugfs_add_adapter_regs) in cxl_debugfs_adapter_add()
72 adapter->native->sl_ops->debugfs_add_adapter_regs(adapter, dir); in cxl_debugfs_adapter_add()
114 if (afu->adapter->native->sl_ops->debugfs_add_afu_regs) in cxl_debugfs_afu_add()
115 afu->adapter->native->sl_ops->debugfs_add_afu_regs(afu, dir); in cxl_debugfs_afu_add()
DMakefile5 cxl-y += main.o file.o irq.o fault.o native.o
Dcxl.h476 struct cxl_afu_native *native; member
677 struct cxl_native *native; member
777 return cxl->native->p1_mmio + cxl_reg_off(reg); in _cxl_p1_addr()
797 return afu->native->p1n_mmio + cxl_reg_off(reg); in _cxl_p1n_addr()
Dcontext.c103 ctx->elem = &ctx->afu->native->spa[i]; in cxl_context_init()
Dsysfs.c65 psl_tb = adapter->native->sl_ops->timebase_read(adapter); in psl_timebase_synced_show()
215 return scnprintf(buf, PAGE_SIZE, "%llu\n", afu->native->pp_offset); in pp_mmio_off_show()
Dirq.c316 ctx->irqs.offset[0] = ctx->afu->native->psl_hwirq; in afu_allocate_irqs()
/drivers/gpu/drm/msm/dp/
Ddp_aux.c32 bool native; member
94 if (!aux->native) { /* i2c */ in dp_aux_write()
173 if (aux->native || i2c_read || ((input_msg->address != edid_address) && in dp_aux_update_offset_and_segment()
276 aux->native = msg->request & (DP_AUX_NATIVE_WRITE & DP_AUX_NATIVE_READ); in dp_aux_transfer()
280 msg->reply = aux->native ? in dp_aux_transfer()
286 if ((aux->native && msg->size > aux_cmd_native_max) || in dp_aux_transfer()
315 if (aux->native) { in dp_aux_transfer()
329 msg->reply = aux->native ? DP_AUX_NATIVE_REPLY_ACK : DP_AUX_I2C_REPLY_ACK; in dp_aux_transfer()
332 msg->reply = aux->native ? DP_AUX_NATIVE_REPLY_DEFER : DP_AUX_I2C_REPLY_DEFER; in dp_aux_transfer()
338 msg->reply = aux->native ? DP_AUX_NATIVE_REPLY_NACK : DP_AUX_I2C_REPLY_NACK; in dp_aux_transfer()
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/drivers/gpu/drm/msm/edp/
Dedp_aux.c37 bool native = msg->request & (DP_AUX_NATIVE_WRITE & DP_AUX_NATIVE_READ); in edp_msg_fifo_tx() local
71 if (!native) /* i2c */ in edp_msg_fifo_tx()
116 bool native = msg->request & (DP_AUX_NATIVE_WRITE & DP_AUX_NATIVE_READ); in edp_aux_transfer() local
121 msg->reply = native ? in edp_aux_transfer()
127 if ((native && (msg->size > AUX_CMD_NATIVE_MAX)) || in edp_aux_transfer()
166 msg->reply = native ? in edp_aux_transfer()
170 msg->reply = native ? in edp_aux_transfer()
/drivers/ps3/
Dps3av.c633 id = ps3av_resbit2id(info->res_50.native, info->res_60.native, in ps3av_hdmi_get_id()
634 info->res_vesa.native); in ps3av_hdmi_get_id()
676 info->res_60.res_bits, info->res_60.native); in ps3av_monitor_info_dump()
678 info->res_50.res_bits, info->res_50.native); in ps3av_monitor_info_dump()
680 info->res_other.res_bits, info->res_other.native); in ps3av_monitor_info_dump()
682 info->res_vesa.res_bits, info->res_vesa.native); in ps3av_monitor_info_dump()
744 info->res_60.native &= ~quirk->clear_60; in ps3av_fixup_monitor_info()
/drivers/idle/
DKconfig9 native Intel hardware idle features. The acpi_idle driver
/drivers/gpu/drm/nouveau/
Dnouveau_connector.c827 struct drm_display_mode *native = nv_connector->native_mode, *m; in nouveau_connector_scaler_modes_add() local
832 if (!native) in nouveau_connector_scaler_modes_add()
836 if (mode->hdisplay <= native->hdisplay && in nouveau_connector_scaler_modes_add()
837 mode->vdisplay <= native->vdisplay && in nouveau_connector_scaler_modes_add()
838 (mode->hdisplay != native->hdisplay || in nouveau_connector_scaler_modes_add()
839 mode->vdisplay != native->vdisplay)) { in nouveau_connector_scaler_modes_add()
841 drm_mode_vrefresh(native), false, in nouveau_connector_scaler_modes_add()
/drivers/i3c/
DKconfig10 support for high speed transfers and native interrupt support
/drivers/staging/vc04_services/bcm2835-camera/
DTODO15 hardware can do. If we exposed the native padding requirements
/drivers/ufs/core/
DKconfig21 but are also used by the UFS native command set.
/drivers/net/ethernet/mellanox/mlx4/
Dqp.c91 int sqd_event, struct mlx4_qp *qp, int native) in __mlx4_qp_modify() argument
146 MLX4_CMD_2RST_QP, MLX4_CMD_TIME_CLASS_A, native); in __mlx4_qp_modify()
185 op[cur_state][new_state], MLX4_CMD_TIME_CLASS_C, native); in __mlx4_qp_modify()
/drivers/input/mouse/
DKconfig343 Say Y here if you have an Amiga and want its native mouse
354 Say Y here if you have an Atari and want its native mouse
365 native mouse supported.
/drivers/block/xen-blkback/
Dblkback.c1122 memcpy(&req, RING_GET_REQUEST(&blk_rings->native, rc), sizeof(req)); in __do_block_io_op()
1412 resp = RING_GET_RESPONSE(&blk_rings->native, in make_response()
1413 blk_rings->native.rsp_prod_pvt); in make_response()
Dcommon.h194 struct blkif_back_ring native; member
/drivers/crypto/caam/
DKconfig107 scatterlist crypto API (such as the linux native IPSec
/drivers/w1/slaves/
DKconfig163 kernel and userspace tools as on any other "native" I2C bus.
/drivers/gpu/drm/nouveau/dispnv50/
Ddisp.c958 struct drm_display_mode *native; member
1082 mstc->native); in nv50_msto_atomic_check()
1280 if (mstc->native) in nv50_mstc_get_modes()
1281 drm_mode_destroy(mstc->connector.dev, mstc->native); in nv50_mstc_get_modes()
1282 mstc->native = nouveau_conn_native_mode(&mstc->connector); in nv50_mstc_get_modes()

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