/drivers/gpu/drm/amd/display/dc/core/ |
D | dc_resource.c | 1760 struct dc_state *new_ctx, in dc_add_stream_to_ctx() argument 1766 if (new_ctx->stream_count >= dc->res_pool->timing_generator_count) { in dc_add_stream_to_ctx() 1771 new_ctx->streams[new_ctx->stream_count] = stream; in dc_add_stream_to_ctx() 1773 new_ctx->stream_count++; in dc_add_stream_to_ctx() 1775 res = dc->res_pool->funcs->add_stream_to_ctx(dc, new_ctx, stream); in dc_add_stream_to_ctx() 1787 struct dc_state *new_ctx, in dc_remove_stream_from_ctx() argument 1792 struct pipe_ctx *del_pipe = resource_get_head_pipe_for_stream(&new_ctx->res_ctx, stream); in dc_remove_stream_from_ctx() 1805 &new_ctx->res_ctx, in dc_remove_stream_from_ctx() 1812 &new_ctx->res_ctx, in dc_remove_stream_from_ctx() 1817 resource_unreference_clock_source(&new_ctx->res_ctx, in dc_remove_stream_from_ctx() [all …]
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D | dc.c | 1850 struct dc_state *new_ctx = kvmalloc(sizeof(struct dc_state), GFP_KERNEL); in dc_copy_state() local 1852 if (!new_ctx) in dc_copy_state() 1854 memcpy(new_ctx, src_ctx, sizeof(struct dc_state)); in dc_copy_state() 1857 struct pipe_ctx *cur_pipe = &new_ctx->res_ctx.pipe_ctx[i]; in dc_copy_state() 1860 cur_pipe->top_pipe = &new_ctx->res_ctx.pipe_ctx[cur_pipe->top_pipe->pipe_idx]; in dc_copy_state() 1863 cur_pipe->bottom_pipe = &new_ctx->res_ctx.pipe_ctx[cur_pipe->bottom_pipe->pipe_idx]; in dc_copy_state() 1866 cur_pipe->prev_odm_pipe = &new_ctx->res_ctx.pipe_ctx[cur_pipe->prev_odm_pipe->pipe_idx]; in dc_copy_state() 1869 cur_pipe->next_odm_pipe = &new_ctx->res_ctx.pipe_ctx[cur_pipe->next_odm_pipe->pipe_idx]; in dc_copy_state() 1873 for (i = 0; i < new_ctx->stream_count; i++) { in dc_copy_state() 1874 dc_stream_retain(new_ctx->streams[i]); in dc_copy_state() [all …]
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/drivers/gpu/drm/amd/display/dc/dcn20/ |
D | dcn20_resource.h | 134 bool dcn20_validate_dsc(struct dc *dc, struct dc_state *new_ctx); 168 enum dc_status dcn20_add_stream_to_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_st… 170 enum dc_status dcn20_remove_stream_from_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stre…
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D | dcn20_resource.c | 1752 struct dc_state *new_ctx, in remove_dsc_from_stream_resource() argument 1759 if (new_ctx->res_ctx.pipe_ctx[i].stream == dc_stream && !new_ctx->res_ctx.pipe_ctx[i].top_pipe) { in remove_dsc_from_stream_resource() 1760 pipe_ctx = &new_ctx->res_ctx.pipe_ctx[i]; in remove_dsc_from_stream_resource() 1763 dcn20_release_dsc(&new_ctx->res_ctx, dc->res_pool, &pipe_ctx->stream_res.dsc); in remove_dsc_from_stream_resource() 1774 enum dc_status dcn20_add_stream_to_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_st… in dcn20_add_stream_to_ctx() argument 1778 result = resource_map_pool_resources(dc, new_ctx, dc_stream); in dcn20_add_stream_to_ctx() 1781 result = resource_map_phy_clock_resources(dc, new_ctx, dc_stream); in dcn20_add_stream_to_ctx() 1785 result = dcn20_add_dsc_to_stream_resource(dc, new_ctx, dc_stream); in dcn20_add_stream_to_ctx() 1788 result = dcn20_build_mapped_resource(dc, new_ctx, dc_stream); in dcn20_add_stream_to_ctx() 1794 enum dc_status dcn20_remove_stream_from_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stre… in dcn20_remove_stream_from_ctx() argument [all …]
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/drivers/gpu/drm/amd/display/dc/dce100/ |
D | dce100_resource.h | 46 struct dc_state *new_ctx,
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D | dce100_resource.c | 893 struct dc_state *new_ctx, in dce100_add_stream_to_ctx() argument 898 result = resource_map_pool_resources(dc, new_ctx, dc_stream); in dce100_add_stream_to_ctx() 901 result = resource_map_clock_resources(dc, new_ctx, dc_stream); in dce100_add_stream_to_ctx() 904 result = build_mapped_resource(dc, new_ctx, dc_stream); in dce100_add_stream_to_ctx()
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/drivers/gpu/drm/amd/display/dc/dce112/ |
D | dce112_resource.h | 52 struct dc_state *new_ctx,
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D | dce112_resource.c | 1012 struct dc_state *new_ctx, in dce112_add_stream_to_ctx() argument 1017 result = resource_map_pool_resources(dc, new_ctx, dc_stream); in dce112_add_stream_to_ctx() 1020 result = resource_map_phy_clock_resources(dc, new_ctx, dc_stream); in dce112_add_stream_to_ctx() 1024 result = build_mapped_resource(dc, new_ctx, dc_stream); in dce112_add_stream_to_ctx()
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/drivers/gpu/drm/amd/display/dc/dcn30/ |
D | dcn30_resource.h | 94 struct dc_state *new_ctx,
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D | dcn30_resource.c | 1421 enum dc_status dcn30_add_stream_to_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_st… in dcn30_add_stream_to_ctx() argument 1424 return dcn20_add_stream_to_ctx(dc, new_ctx, dc_stream); in dcn30_add_stream_to_ctx()
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/drivers/gpu/drm/amd/display/dc/inc/ |
D | core_types.h | 155 struct dc_state *new_ctx, 160 struct dc_state *new_ctx,
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/drivers/gpu/drm/amd/display/dc/ |
D | dc_stream.h | 358 struct dc_state *new_ctx, 363 struct dc_state *new_ctx,
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D | dc.h | 1067 struct dc_state *new_ctx,
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/drivers/gpu/drm/amd/display/dc/dce110/ |
D | dce110_resource.c | 1104 struct dc_state *new_ctx, in dce110_add_stream_to_ctx() argument 1109 result = resource_map_pool_resources(dc, new_ctx, dc_stream); in dce110_add_stream_to_ctx() 1112 result = resource_map_clock_resources(dc, new_ctx, dc_stream); in dce110_add_stream_to_ctx() 1116 result = build_mapped_resource(dc, new_ctx, dc_stream); in dce110_add_stream_to_ctx()
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/drivers/gpu/drm/amd/display/dc/dcn10/ |
D | dcn10_resource.c | 1133 struct dc_state *new_ctx, in dcn10_add_stream_to_ctx() argument 1138 result = resource_map_pool_resources(dc, new_ctx, dc_stream); in dcn10_add_stream_to_ctx() 1141 result = resource_map_phy_clock_resources(dc, new_ctx, dc_stream); in dcn10_add_stream_to_ctx() 1145 result = build_mapped_resource(dc, new_ctx, dc_stream); in dcn10_add_stream_to_ctx()
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/drivers/media/platform/s5p-mfc/ |
D | s5p_mfc_opr_v5.c | 1319 int new_ctx; in s5p_mfc_try_run_v5() local 1333 new_ctx = s5p_mfc_get_new_ctx(dev); in s5p_mfc_try_run_v5() 1334 if (new_ctx < 0) { in s5p_mfc_try_run_v5() 1343 ctx = dev->ctx[new_ctx]; in s5p_mfc_try_run_v5()
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D | s5p_mfc_opr_v6.c | 1960 int new_ctx; in s5p_mfc_try_run_v6() local 1973 new_ctx = s5p_mfc_get_new_ctx(dev); in s5p_mfc_try_run_v6() 1974 if (new_ctx < 0) { in s5p_mfc_try_run_v6() 1985 mfc_debug(1, "New context: %d\n", new_ctx); in s5p_mfc_try_run_v6() 1986 ctx = dev->ctx[new_ctx]; in s5p_mfc_try_run_v6()
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/drivers/net/wireless/ti/wlcore/ |
D | main.c | 4846 struct ieee80211_chanctx_conf *new_ctx) in __wlcore_switch_vif_chan() argument 4849 new_ctx->def.chan->center_freq); in __wlcore_switch_vif_chan() 4854 cfg80211_get_chandef_type(&new_ctx->def)); in __wlcore_switch_vif_chan() 4867 wlvif->band = new_ctx->def.chan->band; in __wlcore_switch_vif_chan() 4869 wlvif->channel_type = cfg80211_get_chandef_type(&new_ctx->def); in __wlcore_switch_vif_chan() 4872 if (new_ctx->radar_enabled) { in __wlcore_switch_vif_chan() 4905 ret = __wlcore_switch_vif_chan(wl, wlvif, vifs[i].new_ctx); in wlcore_op_switch_vif_chanctx()
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/drivers/net/wireless/intel/iwlwifi/mvm/ |
D | mac80211.c | 4345 ret = __iwl_mvm_add_chanctx(mvm, vifs[0].new_ctx); in iwl_mvm_switch_vif_chanctx_swap() 4351 ret = __iwl_mvm_assign_vif_chanctx(mvm, vifs[0].vif, vifs[0].new_ctx, in iwl_mvm_switch_vif_chanctx_swap() 4366 __iwl_mvm_remove_chanctx(mvm, vifs[0].new_ctx); in iwl_mvm_switch_vif_chanctx_swap() 4401 ret = __iwl_mvm_assign_vif_chanctx(mvm, vifs[0].vif, vifs[0].new_ctx, in iwl_mvm_switch_vif_chanctx_reassign()
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/drivers/net/wireless/ath/ath11k/ |
D | mac.c | 5364 arg->vifs[arg->next_vif].new_ctx = ctx; in ath11k_mac_change_chanctx_fill_iter() 5387 vifs[i].new_ctx->def.chan->center_freq, in ath11k_mac_update_vif_chan() 5389 vifs[i].new_ctx->def.width); in ath11k_mac_update_vif_chan() 5420 ret = ath11k_mac_vdev_restart(arvif, &vifs[i].new_ctx->def); in ath11k_mac_update_vif_chan()
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/drivers/net/wireless/ath/ath10k/ |
D | mac.c | 8636 def = &vifs[0].new_ctx->def; in ath10k_mac_update_rx_channel() 8677 vifs[i].new_ctx->def.chan->center_freq, in ath10k_mac_update_vif_chan() 8679 vifs[i].new_ctx->def.width); in ath10k_mac_update_vif_chan() 8722 ret = ath10k_vdev_restart(arvif, &vifs[i].new_ctx->def); in ath10k_mac_update_vif_chan() 8822 arg->vifs[arg->next_vif].new_ctx = ctx; in ath10k_mac_change_chanctx_fill_iter()
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