Searched refs:num_dwb (Results 1 – 14 of 14) sorted by relevance
/drivers/gpu/drm/amd/display/dc/dcn30/ |
D | dcn30_hwseq.h | 52 unsigned int num_dwb,
|
D | dcn30_hwseq.c | 261 unsigned int num_dwb, in dcn30_mmhubbub_warmup() argument 269 for (i = 0; i < num_dwb; i++) { in dcn30_mmhubbub_warmup() 298 for (i = 0; i < num_dwb; i++) { in dcn30_mmhubbub_warmup() 388 ASSERT(stream->num_wb_info <= dc->res_pool->res_cap->num_dwb); in dcn30_program_all_writeback_pipes_in_tree() 418 ASSERT(wb_info.dwb_pipe_inst < dc->res_pool->res_cap->num_dwb); in dcn30_program_all_writeback_pipes_in_tree()
|
D | dcn30_resource.c | 802 .num_dwb = 1, 1283 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn30_resource_destruct() 1359 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn30_dwbc_create() 1384 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn30_mmhubbub_create()
|
/drivers/gpu/drm/amd/display/dc/inc/ |
D | resource.h | 47 int num_dwb; member
|
D | hw_sequencer.h | 179 unsigned int num_dwb,
|
/drivers/gpu/drm/amd/display/dc/core/ |
D | dc_stream.c | 547 int num_dwb, in dc_stream_warmup_writeback() argument 551 return dc->hwss.mmhubbub_warmup(dc, num_dwb, wb_info); in dc_stream_warmup_writeback()
|
/drivers/gpu/drm/amd/display/dc/dcn302/ |
D | dcn302_resource.c | 263 .num_dwb = 1, 845 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn302_dwbc_create() 880 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn302_mmhubbub_create() 1206 for (i = 0; i < pool->res_cap->num_dwb; i++) { in dcn302_resource_destruct()
|
/drivers/gpu/drm/amd/display/dc/dcn303/ |
D | dcn303_resource.c | 241 .num_dwb = 1, 787 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn303_dwbc_create() 822 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn303_mmhubbub_create() 1132 for (i = 0; i < pool->res_cap->num_dwb; i++) { in dcn303_resource_destruct()
|
/drivers/gpu/drm/amd/display/dc/ |
D | dc_stream.h | 404 int num_dwb,
|
/drivers/gpu/drm/amd/display/dc/dcn301/ |
D | dcn301_resource.c | 819 .num_dwb = 1, 1314 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn301_destruct() 1384 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn301_dwbc_create() 1409 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn301_mmhubbub_create()
|
/drivers/gpu/drm/amd/display/dc/dcn21/ |
D | dcn21_resource.c | 810 .num_dwb = 1, 824 .num_dwb = 1, 836 .num_dwb = 1, 985 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn21_resource_destruct()
|
/drivers/gpu/drm/amd/display/dc/dcn31/ |
D | dcn31_resource.c | 892 .num_dwb = 1, 1410 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn31_resource_destruct() 1483 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn31_dwbc_create() 1508 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn31_mmhubbub_create()
|
/drivers/gpu/drm/amd/display/dc/dcn20/ |
D | dcn20_resource.c | 1018 .num_dwb = 1, 1058 .num_dwb = 1, 1527 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn20_resource_destruct() 3373 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn20_dwbc_create() 3396 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn20_mmhubbub_create()
|
D | dcn20_hwseq.c | 2560 for (i = 0; i < res_pool->res_cap->num_dwb; i++) in dcn20_fpga_init_hw()
|