| /drivers/pci/controller/cadence/ |
| D | pcie-cadence-ep.c | 184 phys_addr_t addr, u64 pci_addr, size_t size) in cdns_pcie_ep_map_addr() argument
197 cdns_pcie_set_outbound_region(pcie, 0, fn, r, false, addr, pci_addr, size); in cdns_pcie_ep_map_addr()
387 u64 pci_addr, pci_addr_mask = 0xff; in cdns_pcie_ep_send_msi_irq() local
408 pci_addr = cdns_pcie_ep_fn_readl(pcie, fn, cap + PCI_MSI_ADDRESS_HI); in cdns_pcie_ep_send_msi_irq()
409 pci_addr <<= 32; in cdns_pcie_ep_send_msi_irq()
410 pci_addr |= cdns_pcie_ep_fn_readl(pcie, fn, cap + PCI_MSI_ADDRESS_LO); in cdns_pcie_ep_send_msi_irq()
411 pci_addr &= GENMASK_ULL(63, 2); in cdns_pcie_ep_send_msi_irq()
414 if (unlikely(ep->irq_pci_addr != (pci_addr & ~pci_addr_mask) || in cdns_pcie_ep_send_msi_irq()
420 pci_addr & ~pci_addr_mask, in cdns_pcie_ep_send_msi_irq()
422 ep->irq_pci_addr = (pci_addr & ~pci_addr_mask); in cdns_pcie_ep_send_msi_irq()
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| D | pcie-cadence-host.c | 306 u64 cpu_addr, pci_addr, size, winsize; in cdns_pcie_host_bar_config() local
314 pci_addr = entry->res->start - entry->offset; in cdns_pcie_host_bar_config()
320 pci_addr, cpu_addr); in cdns_pcie_host_bar_config()
459 u64 pci_addr = res->start - entry->offset; in cdns_pcie_host_init_address_translation() local
465 pci_addr, in cdns_pcie_host_init_address_translation()
471 pci_addr, in cdns_pcie_host_init_address_translation()
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| D | pcie-cadence.c | 28 u64 cpu_addr, u64 pci_addr, size_t size) in cdns_pcie_set_outbound_region() argument
43 (lower_32_bits(pci_addr) & GENMASK(31, 8)); in cdns_pcie_set_outbound_region()
44 addr1 = upper_32_bits(pci_addr); in cdns_pcie_set_outbound_region()
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| /drivers/pci/controller/ |
| D | pcie-rockchip-ep.c | 67 u32 r, u64 cpu_addr, u64 pci_addr, in rockchip_pcie_prog_ep_ob_atu() argument
77 (lower_32_bits(pci_addr) & PCIE_CORE_OB_REGION_ADDR0_LO_ADDR); in rockchip_pcie_prog_ep_ob_atu()
78 addr1 = upper_32_bits(pci_addr); in rockchip_pcie_prog_ep_ob_atu()
234 phys_addr_t addr, u64 pci_addr, in rockchip_pcie_ep_map_addr() argument
241 rockchip_pcie_prog_ep_ob_atu(pcie, fn, r, addr, pci_addr, size); in rockchip_pcie_ep_map_addr()
357 u64 pci_addr; in rockchip_pcie_ep_send_msi_irq() local
383 pci_addr = rockchip_pcie_read(rockchip, in rockchip_pcie_ep_send_msi_irq()
387 pci_addr <<= 32; in rockchip_pcie_ep_send_msi_irq()
388 pci_addr |= rockchip_pcie_read(rockchip, in rockchip_pcie_ep_send_msi_irq()
394 if (unlikely(ep->irq_pci_addr != (pci_addr & PCIE_ADDR_MASK) || in rockchip_pcie_ep_send_msi_irq()
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| D | pcie-iproc.c | 857 int size_idx, u64 axi_addr, u64 pci_addr) in iproc_pcie_ob_write() argument
883 writel(lower_32_bits(pci_addr), pcie->base + omap_offset); in iproc_pcie_ob_write()
884 writel(upper_32_bits(pci_addr), pcie->base + omap_offset + 4); in iproc_pcie_ob_write()
887 window_idx, oarr_offset, &axi_addr, &pci_addr); in iproc_pcie_ob_write()
910 u64 pci_addr, resource_size_t size) in iproc_pcie_setup_ob() argument
966 pci_addr = ALIGN_DOWN(pci_addr, window_size); in iproc_pcie_setup_ob()
971 !IS_ALIGNED(pci_addr, window_size)) { in iproc_pcie_setup_ob()
974 &axi_addr, &pci_addr); in iproc_pcie_setup_ob()
983 axi_addr, pci_addr); in iproc_pcie_setup_ob()
997 pci_addr += window_size; in iproc_pcie_setup_ob()
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| D | pcie-rcar.c | 103 u64 pci_addr, u64 flags, int idx, bool host) in rcar_pcie_set_inbound() argument
110 rcar_pci_write_reg(pcie, lower_32_bits(pci_addr), in rcar_pcie_set_inbound()
116 rcar_pci_write_reg(pcie, upper_32_bits(pci_addr), in rcar_pcie_set_inbound()
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| D | pci-xgene.c | 368 u64 cpu_addr, u64 pci_addr) in xgene_pcie_setup_ob_reg() argument
394 xgene_pcie_writel(port, offset + 0x10, lower_32_bits(pci_addr)); in xgene_pcie_setup_ob_reg()
395 xgene_pcie_writel(port, offset + 0x14, upper_32_bits(pci_addr)); in xgene_pcie_setup_ob_reg()
490 u64 pci_addr = range->pci_addr; in xgene_pcie_setup_ib_reg() local
529 xgene_pcie_setup_pims(port, pim_reg, pci_addr, ~(size - 1)); in xgene_pcie_setup_ib_reg()
550 range.flags, range.cpu_addr, end, range.pci_addr); in xgene_pcie_parse_map_dma_ranges()
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| D | pcie-mediatek-gen3.c | 215 resource_size_t pci_addr, in mtk_pcie_set_trans_table() argument
235 writel_relaxed(lower_32_bits(pci_addr), in mtk_pcie_set_trans_table()
237 writel_relaxed(upper_32_bits(pci_addr), in mtk_pcie_set_trans_table()
342 resource_size_t pci_addr; in mtk_pcie_startup_port() local
356 pci_addr = res->start - entry->offset; in mtk_pcie_startup_port()
358 err = mtk_pcie_set_trans_table(port, cpu_addr, pci_addr, size, in mtk_pcie_startup_port()
365 (unsigned long long)pci_addr, (unsigned long long)size); in mtk_pcie_startup_port()
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| D | pcie-rockchip-host.c | 784 u64 pci_addr, size; in rockchip_pcie_cfg_atu() local
796 pci_addr = entry->res->start - entry->offset; in rockchip_pcie_cfg_atu()
797 rockchip->msg_bus_addr = pci_addr; in rockchip_pcie_cfg_atu()
803 pci_addr + (reg_no << 20), in rockchip_pcie_cfg_atu()
825 pci_addr = entry->res->start - entry->offset; in rockchip_pcie_cfg_atu()
832 pci_addr + (reg_no << 20), in rockchip_pcie_cfg_atu()
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| D | pci-ftpci100.c | 392 u64 pci_addr = entry->res->start - entry->offset; in faraday_pci_parse_map_dma_ranges() local
396 ret = faraday_res_to_memcfg(pci_addr, in faraday_pci_parse_map_dma_ranges()
405 i + 1, pci_addr, end, val); in faraday_pci_parse_map_dma_ranges()
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| D | pcie-microchip-host.c | 920 phys_addr_t axi_addr, phys_addr_t pci_addr, in mc_pcie_setup_window() argument
943 val = lower_32_bits(pci_addr); in mc_pcie_setup_window()
947 val = upper_32_bits(pci_addr); in mc_pcie_setup_window()
964 u64 pci_addr; in mc_pcie_setup_windows() local
969 pci_addr = entry->res->start - entry->offset; in mc_pcie_setup_windows()
971 entry->res->start, pci_addr, in mc_pcie_setup_windows()
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| D | pci-v3-semi.c | 605 u64 pci_addr = entry->res->start - entry->offset; in v3_get_dma_range_config() local
608 if (pci_addr & ~V3_PCI_BASE_M_ADR_BASE) { in v3_get_dma_range_config()
612 val = ((u32)pci_addr) & V3_PCI_BASE_M_ADR_BASE; in v3_get_dma_range_config()
669 pci_addr, pci_end, in v3_get_dma_range_config()
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| D | pcie-rcar-ep.c | 290 phys_addr_t addr, u64 pci_addr, size_t size) in rcar_pcie_ep_map_addr() argument
314 res.start = pci_addr; in rcar_pcie_ep_map_addr()
315 res.end = pci_addr + size - 1; in rcar_pcie_ep_map_addr()
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| D | pcie-rcar.h | 145 u64 pci_addr, u64 flags, int idx, bool host);
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| D | pcie-rcar-host.c | 815 u64 pci_addr = entry->res->start - entry->offset; in rcar_pcie_inbound_ranges() local
846 rcar_pcie_set_inbound(pcie, cpu_addr, pci_addr, in rcar_pcie_inbound_ranges()
849 pci_addr += size; in rcar_pcie_inbound_ranges()
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| /drivers/pci/controller/mobiveil/ |
| D | pcie-mobiveil.c | 137 u64 cpu_addr, u64 pci_addr, u32 type, u64 size) in program_ib_windows() argument
162 mobiveil_csr_writel(pcie, lower_32_bits(pci_addr), in program_ib_windows()
164 mobiveil_csr_writel(pcie, upper_32_bits(pci_addr), in program_ib_windows()
174 u64 cpu_addr, u64 pci_addr, u32 type, u64 size) in program_ob_windows() argument
208 mobiveil_csr_writel(pcie, lower_32_bits(pci_addr), in program_ob_windows()
210 mobiveil_csr_writel(pcie, upper_32_bits(pci_addr), in program_ob_windows()
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| D | pcie-mobiveil.h | 184 u64 pci_addr, u32 type, u64 size);
186 u64 pci_addr, u32 type, u64 size);
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| /drivers/pci/controller/dwc/ |
| D | pcie-designware.c | 279 u64 cpu_addr, u64 pci_addr, in dw_pcie_prog_outbound_atu_unroll() argument
294 lower_32_bits(pci_addr)); in dw_pcie_prog_outbound_atu_unroll()
296 upper_32_bits(pci_addr)); in dw_pcie_prog_outbound_atu_unroll()
323 u64 pci_addr, u64 size) in __dw_pcie_prog_outbound_atu() argument
333 cpu_addr, pci_addr, size); in __dw_pcie_prog_outbound_atu()
351 lower_32_bits(pci_addr)); in __dw_pcie_prog_outbound_atu()
353 upper_32_bits(pci_addr)); in __dw_pcie_prog_outbound_atu()
378 u64 cpu_addr, u64 pci_addr, u64 size) in dw_pcie_prog_outbound_atu() argument
381 cpu_addr, pci_addr, size); in dw_pcie_prog_outbound_atu()
385 int type, u64 cpu_addr, u64 pci_addr, in dw_pcie_prog_ep_outbound_atu() argument
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| D | pcie-tegra194-acpi.c | 49 u64 pci_addr, u64 size) in program_outbound_atu() argument
55 atu_reg_write(pcie_ecam, index, lower_32_bits(pci_addr), in program_outbound_atu()
59 atu_reg_write(pcie_ecam, index, upper_32_bits(pci_addr), in program_outbound_atu()
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| D | pcie-artpec6.c | 97 static u64 artpec6_pcie_cpu_addr_fixup(struct dw_pcie *pci, u64 pci_addr) in artpec6_pcie_cpu_addr_fixup() argument
105 return pci_addr - pp->cfg0_base; in artpec6_pcie_cpu_addr_fixup()
107 return pci_addr - ep->phys_base; in artpec6_pcie_cpu_addr_fixup()
111 return pci_addr; in artpec6_pcie_cpu_addr_fixup()
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| D | pcie-designware-ep.c | 187 u64 pci_addr, size_t size) in dw_pcie_ep_outbound_atu() argument
199 phys_addr, pci_addr, size); in dw_pcie_ep_outbound_atu()
298 phys_addr_t addr, u64 pci_addr, size_t size) in dw_pcie_ep_map_addr() argument
304 ret = dw_pcie_ep_outbound_atu(ep, func_no, addr, pci_addr, size); in dw_pcie_ep_map_addr()
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| D | pcie-designware.h | 298 int type, u64 cpu_addr, u64 pci_addr,
301 int type, u64 cpu_addr, u64 pci_addr,
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| /drivers/scsi/ |
| D | BusLogic.c | 648 unsigned long pci_addr; in blogic_init_mm_probeinfo() local
660 pci_addr = base_addr1 = pci_resource_start(pci_device, 1); in blogic_init_mm_probeinfo()
669 blogic_err("at PCI Bus %d Device %d PCI Address 0x%lX\n", NULL, bus, device, pci_addr); in blogic_init_mm_probeinfo()
679 …PCI Bus %d Device %d I/O Address 0x%lX PCI Address 0x%lX\n", NULL, bus, device, io_addr, pci_addr); in blogic_init_mm_probeinfo()
742 pr_probeinfo->pci_addr = pci_addr; in blogic_init_mm_probeinfo()
754 probeinfo->pci_addr = pci_addr; in blogic_init_mm_probeinfo()
810 probeinfo->pci_addr = 0; in blogic_init_mm_probeinfo()
846 unsigned long pci_addr; in blogic_init_fp_probeinfo() local
858 pci_addr = base_addr1 = pci_resource_start(pci_device, 1); in blogic_init_fp_probeinfo()
867 blogic_err("at PCI Bus %d Device %d PCI Address 0x%lX\n", NULL, bus, device, pci_addr); in blogic_init_fp_probeinfo()
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| D | BusLogic.h | 227 unsigned long pci_addr; member
983 unsigned long pci_addr; member
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| /drivers/pci/ |
| D | of.c | 326 range.cpu_addr + range.size - 1, range.pci_addr); in devm_of_pci_get_host_bridge_resources()
360 pci_add_resource_offset(resources, res, res->start - range.pci_addr); in devm_of_pci_get_host_bridge_resources()
383 range.cpu_addr + range.size - 1, range.pci_addr); in devm_of_pci_get_host_bridge_resources()
402 res->start - range.pci_addr); in devm_of_pci_get_host_bridge_resources()
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